Semiconductor memory element, semiconductor memory device and method of fabricating the same

• US 20050036382A1
• Filed: 12/16/2003
• Published: 02/17/2005
• Est. Priority Date: 12/18/2002
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Kato, Kiyoshi
• Granted Patent: US 7,115,941 B2
• Time in Patent Office: Days
• US Class Current: 365/222
• CPC Class Codes: H01L 27/12 the substrate being other than a semiconductor body, e.g. an insulating body
• CPC Class Codes: H01L 27/1266 the substrate on which the devices are formed not being the final device substrate, e.g. using a temporary substrate
• CPC Class Codes: H01L 27/1285 using control of the annealing or irradiation parameters, e.g. using different scanning direction or intensity for different transistors
• CPC Class Codes: H01L 29/04 characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes characterised by physical imperfections H01L29/30
• CPC Class Codes: H10B 41/40 characterised by the peripheral circuit region
• CPC Class Codes: H10B 41/49 comprising different types of peripheral transistor

Abstract

It is an object to provide a semiconductor memory device having a highly reliable and small-sized involatile memory by realizing a semiconductor memory element which restrains extreme concentration of an electric field onto a surface of activating layer in a channel region and is very minute. Further, it is an object thereof to provide a highly reliable and small-sized semiconductor memory device. There is fabricated a semiconductor memory element in which a surface of an activating layer is flat and which is very minute by using a crystallizing process of a semiconductor activating layer for adding a metal element onto a substrate having an insulating surface to subject to a heating processing and thereafter carrying out continuous oscillating laser irradiation. By using such a semiconductor memory element, a highly reliable and small-sized involatile memory and a semiconductor memory device having the involatile memory are provided.

Claims

1. A semiconductor memory element characterized by comprising a semiconductor activating layer comprising a channel region and one conductive type impurity region, a first gate insulating film, a charge accumulating layer, a second gate insulating film, and a control gate electrode,

wherein the semiconductor memory element is formed over a substrate having an insulating surface;

wherein the semiconductor activating layer includes a metal element;

wherein the channel region is a polycrystal semiconductor film crystallized by being continuously scanned at least in the same channel region in irradiating a laser beam; and

wherein a grain boundary of a crystal grain constituting the polycrystal semiconductor film is flat or formed with a recessed portion.

7. The semiconductor memory element according to any one of claim 1 through claim 6, characterized in that a concentration of the metal element falls in a range of 1×

10¹⁶/cm³through 5×

10¹⁸/cm³.

8. The semiconductor memory element according any one of claim 1 through claim 6, characterized in that the semiconductor activating layer is the polycrystal semiconductor film subjected to a heating treatment and adding the metal element.

9. The semiconductor memory element according to any one of claim 1 through claim 6, characterized in that the metal element is one kind or a plurality of kinds selected from the group consisting of Fe, Ni, Co, Ge, Sn, Pd, Pt, Cu, and Au.

10. The semiconductor memory element according to any one of claim 1 through claim 6, characterized in that a channel length of the semiconductor memory element is 0.01 μ

m through 2 μ

m.

11. A semiconductor memory device characterized by including a memory cell array arranged with the semiconductor memory element according to any one of claim 1 through claim 6 in a shape of a matrix.

12. A semiconductor memory device characterized in that a memory cell array arranged with the semiconductor memory element according to any one of claim 1 through claim 6 in a shape of a matrix is formed on a plastic substrate or a ceramic substrate.

13. A semiconductor memory device characterized by including an IC chip constituted by laminating an involatile memory having a memory cell array arranged with the semiconductor memory element according to any one of claim 1 through claim 6 in a shape of a matrix.

14. A semiconductor memory device characterized in that the semiconductor memory device according to any one of claim 1 through claim 6 is one selected from a game machine, a video camera, a head attaching type display, a DVD player, a personal computer, a portable telephone, and a car audio.

2. A semiconductor memory element characterized by comprising a semiconductor activating layer comprising a channel region and one conductive type impurity region, a first gate insulating film, a charge accumulating layer, a second gate insulating film, and a control gate electrode,

wherein the semiconductor memory element is formed over a substrate having an insulating surface;

wherein the semiconductor activating layer includes a metal element;

wherein the semiconductor activating layer is a polycrystal semiconductor film constituted by aggregating a plurality of crystal grains elongated in the same direction; and

wherein a grain boundary of the crystal grain constituting the polycrystal semiconductor film is flat or formed with a recessed portion.

3. A semiconductor memory element characterized by comprising a semiconductor activating layer comprising a channel region and one conductive type impurity region, a first gate insulating film, a charge accumulating layer, a second gate insulating film, and a control gate electrode,

wherein the semiconductor memory element is formed over a substrate having an insulating surface;

wherein the semiconductor activating layer includes a metal element;

wherein the channel region is a polycrystal semiconductor film crystallized by being continuously scanned at least in the same channel region in irradiating a laser beam; and

wherein a surface roughness of the channel region is 0.1 nm through 60 nm in a P-V value.

4. A semiconductor memory element characterized by comprising a semiconductor activating layer comprising a channel region and one conductive type impurity region, a first gate insulating film, a charge accumulating layer, a second gate insulating film, and a control gate electrode;

wherein the semiconductor memory element is formed over a substrate having an insulating surface,

wherein the semiconductor activating layer includes a metal element;

wherein the semiconductor activating layer is a polycrystal semiconductor film constituted by aggregating a plurality of crystal grains elongated in the same direction; and

wherein a surface roughness of the channel region is 0.1 nm through 60 nm in a P-V value.

5. A semiconductor memory element characterized by comprising a semiconductor activating layer comprising a channel region and one conductive type impurity region, a first gate insulating film, a charge accumulating layer, a second gate insulating film, and a control gate electrode,

wherein the semiconductor memory element is formed over a substrate having an insulating surface;

wherein the semiconductor activating layer includes a metal element;

wherein the channel region is a polycrystal semiconductor film crystallized by being continuously scanned at least in the same channel region in irradiating a laser beam; and

wherein a surface roughness of the channel region is 0.1 nm through 5 nm in a rms value.

6. A semiconductor memory element characterized by comprising a semiconductor activating layer comprising a channel region and one conductive type impurity region, a first gate insulating film, a charge accumulating layer, a second gate insulating film, and a control gate electrode,

wherein the semiconductor memory element is formed over a substrate having an insulating surface;

wherein the semiconductor activating layer includes a metal element;

wherein the semiconductor activating layer is a polycrystal semiconductor film constituted by aggregating a plurality of crystal grains elongated in the same direction; and

wherein a surface roughness of the channel region is 0.1 nm through 5 nm in a rms value.

15. A method of fabricating a semiconductor memory element over the substrate having an insulating surface characterized by comprising:

forming an amorphous semiconductor film over the substrate having the insulating surface;

adding a metal element promoting crystallization to the amorphous semiconductor film;

subjecting the amorphous semiconductor film to a heating treatment;

irradiating the amorphous semiconductor film with a laser beam;

forming a polycrystal semiconductor film by scanning the laser beam continuously at least in the same channel region;

forming a first gate insulating film over the polycrystal semiconductor film; and

forming a charge accumulating layer, a second gate insulating film, and a control gate electrode to laminate on the first gate insulating film.

16. The method of fabricating a semiconductor memory element according to claim 15 characterized in that the laser beam is a continuously oscillating laser.