Fast settling data slicer comprising a low-pass filter with switchable cut-off frequency and a notch-filter

• US 20050036568A1
• Filed: 12/23/2002
• Published: 02/17/2005
• Est. Priority Date: 01/29/2002
• Status: Abandoned Application

• Current Assignee: Koninklijke Philips Electronics N.V. (Koninklijke Philips N.V.)
• Original Assignee: Koninklijke Philips Electronics N.V. (Koninklijke Philips N.V.)
• Inventors: Doornekamp, Marinus Hendrikus, De Ruijter, Hendricus Clemens
• Application Number:
  US10/502,521
• Publication Number:
  US 20050036568A1
• Time in Patent Office: Days
• US Class Current: 375/316
• CPC Class Codes: H04L 25/062 Setting decision thresholds using feedforward techniques only

Abstract

A data slicer circuit for extracting data from a received analogue signal having a preamble and a data portion with the data. The circuit comprises a low pass filter for obtaining a DC value of the received signal, and a comparator for comparing the received analogue signal to the DC value of the received signal. In dependence on the comparison of the received analogue signal to the DC value of the received signal, the comparator generates a digital bit stream. A filter for rejecting the preamble frequency receives analogue signal and feeds a filtered signal to the low pass filter. By rejecting the preamble frequency, before or after, the low pass filter a shorter settling time can be obtained.

Claims

1. A method of extracting data from a received analogue signal, the received analogue signal having a preamble of a predetermined preamble frequency and a predetermined preamble duration, and a data portion with the data, the data portion having a predetermined data rate, the method comprising

obtaining a signal representing a DC value (Vdc) of the received signal,

comparing the received analogue signal to the signal representing a DC value (Vdc) of the received signal, and

generating, in dependence on the comparison of the received analogue signal to the DC value (Vdc) of the received signal, a digital bit stream,

characterized in that, prior to obtaining the signal representing a DC value (Vdc) of the received signal, the received signal is filtered so a to reject the predetermined preamble frequency.

2. A method according to claim 1, characterized in that the signal representing a DC value (Vdc) of the received signal is obtained using a low pass filter.

3. A method according to claim 2, characterized in that the low pass filter is switchable between a first cut-off frequency and a second cut-off frequency lower than the first cut-off frequency, and that during reception of the preamble the low pass filter is switched to the first cut-off frequency, and that during reception of data the low pass filter is switched to the second cut-off frequency.

4. A method according to claim 1, characterized in that the received analogue signal is a demodulated signal.

5. A data slicer circuit for extracting data from a received analogue signal, the received analogue signal having a preamble of a predetermined preamble frequency and a data portion with the data, the data portion having a predetermined data frequency, the circuit comprising

a low pass filter for obtaining a signal representing a DC value (Vdc) of the received signal,

a comparator for comparing the received analogue signal to the signal representing a DC value (Vdc) of the received signal, and for generating, in dependence on the comparison of the received analogue signal to the DC value (Vdc) of the received signal, a digital bit stream,

characterized in that, a filter for rejecting the predetermined preamble frequency is coupled to receive the received analogue signal and to feed a rejection filtered signal to the low pass filter.

6. A data slicer circuit according to claim 5, characterized in that the low pass filter is switchable between a first cut-off frequency and a second cut-off frequency lower than the first cut-off frequency, and that during reception of the preamble the low pass filter is switchable to the first cut-off frequency, and that during reception of data the low pass filter is switchable to the second cut-off frequency.

7. A data slicer circuit according to claim 5, characterized in that the filter for rejecting the predetermined preamble frequency is a notch filter.

8. A data slicer circuit according to claim 7, characterized in that the notch filter is a first order notch filter with a 3 dB bandwidth equal to its frequency of maximum rejection.