Semiconductor device and method of manufacturing the same

• US 20050037569A1
• Filed: 09/23/2004
• Published: 02/17/2005
• Est. Priority Date: 06/17/1999
• Status: Active Grant

• Current Assignee: Fujitsu Semiconductor Limited (Fujitsu Limited)
• Original Assignee: Fujitsu Limited
• Inventors: Itoh, Akio
• Granted Patent: US 7,074,625 B2
• Time in Patent Office: Days
• US Class Current: 438/253
• CPC Class Codes: H01L 21/02164 the material being a silicon oxide, e.g. SiO2
• CPC Class Codes: H01L 21/02197 the material having a perovskite structure, e.g. BaTiO3
• CPC Class Codes: H01L 21/02274 in the presence of a plasma [PECVD]
• CPC Class Codes: H01L 21/02332 into an oxide layer, e.g. changing SiO to SiON
• CPC Class Codes: H01L 21/0234 treatment by exposure to a plasma
• CPC Class Codes: H01L 21/02356 treatment to change the morphology of the insulating layer, e.g. transformation of an amorphous layer into a crystalline layer
• CPC Class Codes: H01L 21/3105 After-treatment
• CPC Class Codes: H01L 21/31053 involving a dielectric removal step
• CPC Class Codes: H01L 21/31612 on a silicon body
• CPC Class Codes: H01L 28/40 Capacitors
• CPC Class Codes: H10B 12/09 with simultaneous manufacture of the peripheral circuit region and memory cells
• CPC Class Codes: H10B 53/00 Ferroelectric RAM [FeRAM] devices comprising ferroelectric memory capacitors
• CPC Class Codes: H10B 53/30 characterised by the memory core region

Abstract

There is provided a semiconductor device which is manufactured via steps of forming a capacitor which is obtained by forming in sequence an upper electrode, a dielectric film formed of ferroelectric material or high-dielectric material, and a lower electrode on a semiconductor substrate, then forming an interlayer insulating film on the capacitor, then planarizing a surface of the interlayer insulating film by the CMP polishing, then removing a moisture attached to a surface of the interlayer insulating film or a moisture contained in the interlayer insulating film by applying the plasma annealing using an N₂O gas, and then forming a redeposited interlayer film on the interlayer insulating film.

Claims

1. A method of manufacturing a semiconductor device comprising the steps of:

forming a transistor on a semiconductor substrate;

forming a first insulating film on the semiconductor substrate to cover the transistor;

forming a capacitor, which includes a dielectric film formed of either a ferroelectric material or a high-dielectric material and an upper electrode and a lower electrode formed to put the dielectric film therebetween, on the first insulating film;

forming a second insulating film over the capacitor;

planarizing an upper surface by polishing the second insulating film; and

applying a dehydration process to the second insulating film by plasma annealing.

2. A method according to claim 1, wherein the plasma annealing is performed by plasmanizing a single gas of one of N₂O, N₂, NO, and O₂.

3. A method of manufacturing a semiconductor device according to claim 1, wherein the second insulating film is formed by a plasma enhanced CVD method using a TEOS gas.

4. A method of manufacturing a semiconductor device according to claim 1, wherein cavity is formed in the second insulating film.

5. A method of manufacturing a semiconductor device according to claim 4, wherein upper portions of cavity is exposed by polishing the second insulating film.

6. A method of manufacturing a semiconductor device according to claim 1, further comprising the step of:

forming a third insulating film on the second insulating film after the dehydration process.

7. A method of manufacturing a semiconductor device according to claim 1, further comprising the step of:

forming a fourth insulating film between the capacitor and the second insulating film to cover the capacitor; and

forming a wiring between the second insulating film and the fourth insulating film.