Massive collective network processing system and methods

• US 20050038852A1
• Filed: 09/09/2004
• Published: 02/17/2005
• Est. Priority Date: 06/25/1999
• Status: Abandoned Application

• Current Assignee: Massively Parallel Technologies, Inc
• Original Assignee: Massively Parallel Technologies, Inc
• Inventors: Howard, Kevin D.
• Application Number:
  US10/937,224
• Publication Number:
  US 20050038852A1
• Time in Patent Office: Days
• US Class Current: 709/205
• CPC Class Codes: G06F 2209/509 Offload
• CPC Class Codes: G06F 9/5044 considering hardware capabilities

Abstract

Methods and systems are provided for accelerating execution of programs of the type run by individuals or companies. The methods include the steps of communicating at least one program function to a library in data communication with the program and transmitting the function to a computing facility, typically in the form of computer clusters. The function is processed at the computing facility and results are relayed back to the user of the programs. Users of the invention pay for accelerated execution by one of several interfaces, such as through on-line transactions and/or through prearranged ISP connectivity. Accelerated processing is initiated, typically, by clicking on a computer ion; and results appear seamlessly—though accelerated—to the user. The clusters of the invention can mix and match computers of different processing speeds to maximize the MIPS per dollar in processing accelerated functions for users.

Claims

1. A cluster for accelerated parallel processing of one or more programs, comprising:

a heterogeneous array of computers networked together through at least one switch, each computer having a processing speed; and

a plurality of the array of computers arranged for processing part of the program through threads of common speed, the common speed being less than the processing speed and being defined by the speed of the switch.

2. A cluster of claim 1, further comprising a Home Node for maintaining parallelization through the array of computers.

3. A cluster of claim 1, further comprising a controller for dynamically adjusting thread speed through the array of computers.

4. a cluster of claim 1, wherein each computer of the array comprises a unique TCP/IP address addressable through the switch.

5. A cluster of claim 1, further comprising a Home Node for reallocating threads among the array of computers upon a failure of one or more computers.