Method and apparatus for accessing a memory
First Claim
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1. A memory access mechanism, comprising:
- an upper layer protocol a translation page table for storing data corresponding to a plurality of memory regions; and
a plurality of steering tags that are controlled by the upper layer protocol, the upper layer protocol allocating at least one of the plurality of steering tags to be associated with at least one of the plurality of memory regions for a memory operation.
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Abstract
The disclosed embodiments relate to an optimized memory registration mechanism that may comprise an upper layer protocol that associates I/O buffers with memory regions and that manages steering tags. The memory regions may be associated with a translation page table. The upper layer protocol may allocate one of the steering tags associated with at least one of the memory regions for a memory operation.
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Citations
20 Claims
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1. A memory access mechanism, comprising:
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an upper layer protocol a translation page table for storing data corresponding to a plurality of memory regions; and
a plurality of steering tags that are controlled by the upper layer protocol, the upper layer protocol allocating at least one of the plurality of steering tags to be associated with at least one of the plurality of memory regions for a memory operation. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A computer network, comprising:
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a first computer system having a first consumer and at least one input/output device;
a second computer system having a second consumer and at least one input/output device;
a switch network that connects the first and second computer systems for communication; and
wherein the at least one input/output device in the first computer system comprises a memory access mechanism, the memory access mechanism comprising;
a plurality of buffers associated with the consumer; and
a plurality of steering tags that are managed by the consumer, wherein the consumer allocates one of the plurality of steering tags to be associated with at least one of the plurality of buffers for a memory access operation. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. A method for providing access to a memory, the method comprising the acts of:
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allocating a plurality of steering tags associated with an upper layer protocol in a first node;
allocating a plurality of buffers associated with the upper layer protocol;
issuing a command to a “
remote direct memory access”
network interface card after the allocation of the plurality of steering tags has been completed;
binding one of the plurality of steering tags to at least one of the plurality of buffers once a command is received at the upper layer protocol which accomplishes the binding by issuing a request to the “
remote direct memory access”
network interface card. - View Dependent Claims (16, 17, 18, 19, 20)
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Specification