Methods for fabricating current-carrying structures using voltage switchable dielectric materials

• US 20050039949A1
• Filed: 09/14/2004
• Published: 02/24/2005
• Est. Priority Date: 08/27/1999
• Status: Active Grant

• Current Assignee: Littelfuse Incorporated
• Original Assignee: Shocking Technologies, Inc.
• Inventors: Kosowsky, Lex
• Granted Patent: US 7,446,030 B2
• Time in Patent Office: Days
• US Class Current: 174/262
• CPC Class Codes: C25D 5/56 of plastics
• CPC Class Codes: H05K 1/0254 High voltage adaptations; Electrical insulation details; Overvoltage or electrostatic discharge protection electrostatic discharge protection for electric apparatus in general H05K9/0067, H05K9/0079; Arrangements for regulating voltages or for using plural voltages
• CPC Class Codes: H05K 1/0373 containing additives, e.g. fillers H05K1/036 takes precedence
• CPC Class Codes: H05K 1/167 incorporating printed resistors
• CPC Class Codes: H05K 2201/0215 Metallic fillers
• CPC Class Codes: H05K 2201/0738 Use of voltage responsive materials, e.g. voltage switchable dielectric or varistor materials
• CPC Class Codes: H05K 2203/105 Using an electrical field; Special methods of applying an electric potential electroplating H05K2203/0723
• CPC Class Codes: H05K 3/188 by direct electroplating
• CPC Class Codes: H05K 3/423 characterised by electroplating method
• CPC Class Codes: H05K 3/426 initial plating of through-holes in substrates without metal

Abstract

A method is provided for fabricating current-carrying formation on substrates. The method includes providing a substrate including a layer of a voltage switchable dielectric material, forming a mask over the layer of the voltage switchable dielectric material, and forming an electrically conductive layer. The mask includes gaps and the electrically conductive layer is formed in the gaps. The voltage switchable dielectric material has a characteristic voltage and the electrically conductive layer is formed by applying a voltage in excess of the characteristic voltage to the substrate and depositing the electrically conductive material through an electrochemical process such as electroplating.

Claims

1. A method for fabricating a current-carrying formation, comprising:

providing a substrate including a layer of a voltage switchable dielectric material having a characteristic voltage;

forming a mask over the layer of the voltage switchable dielectric material, the mask including gaps therein; and

forming an electrically conductive layer by

applying a voltage in excess of the characteristic voltage to the layer of the voltage switchable dielectric material, and

depositing an electrically conductive material within the gaps through an electrochemical process.

2. The method of claim 1 wherein the substrate comprises a non-planar structure.

3. The method of claim 1 wherein the substrate is flexible.

4. The method of claim 1 wherein forming the mask includes patterning a non-conductive layer.

5. The method of claim 4 wherein the non-conductive layer includes a dry resist film.

6. The method of claim 1 wherein the electrochemical process includes electroplating.

7. The method of claim 1 wherein the electrochemical process includes plasma deposition.

8. The method of claim 1 wherein the electrochemical process includes vapor deposition.

9. The method of claim 1 wherein the electrochemical process includes an electrostatic process.

10. The method of claim 1 further comprising removing the mask after forming the electrically conductive layer.

11. The method of claim 10 wherein removing the mask includes stripping with a base solution.

12. The method of claim 1 further comprising polishing the electrically conductive layer.

13. The method of claim 12 wherein polishing includes chemical-mechanical polishing.

14. The method of claim 1 wherein the method does not include forming a seed layer on the substrate before forming the electrically conductive material.

15. The method of claim 1 wherein depositing the electrically conductive material includes depositing a magnetic material.

16. The method of claim 1 wherein the electrochemical process includes a pulse plating process.

17. The method of claim 1 wherein the electrochemical process includes a reverse pulse plating process.

18. The method of claim 1 wherein the substrate includes a pin receptacle and forming the mask includes disposing a gap over the pin receptacle.