Semiconductor display device correcting system and correcting method of semiconductor display device

• US 20050041122A1
• Filed: 09/16/2004
• Published: 02/24/2005
• Est. Priority Date: 09/03/1997
• Status: Active Grant

• Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Original Assignee: Semiconductor Energy Laboratory Co., Ltd.
• Inventors: Koyama, Jun, Yamazaki, Shunpei
• Granted Patent: US 9,053,679 B2
• Time in Patent Office: Days
• US Class Current: 348/254
• CPC Class Codes: G09G 2300/0408 Integration of the drivers onto the display substrate
• CPC Class Codes: G09G 2310/027 Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
• CPC Class Codes: G09G 2320/0276 for the purpose of adaptation to the characteristics of a display device, i.e. gamma correction
• CPC Class Codes: G09G 2320/0693 Calibration of display systems
• CPC Class Codes: G09G 3/001 using specific devices not provided for in groups G09G3/02 - G09G3/36, e.g. using an intermediate record carrier such as a film slide; Projection systems; Display of non-alphanumerical information, solely or in combination with alphanumerical information, e.g. digital display on projected diapositive as background slide projectors per se G03B23/00 = 42 HP
• CPC Class Codes: G09G 3/3648 using an active matrix G09G3/367 - G09G3/3696 take precedence
• CPC Class Codes: G09G 3/3688 suitable for active matrices only
• CPC Class Codes: G09G 3/3696 Generation of voltages supplied to electrode drivers
• CPC Class Codes: G11C 16/0433 comprising cells containing a single floating gate transistor and one or more separate select transistors
• CPC Class Codes: H01L 29/66757 Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
• CPC Class Codes: H01L 29/78621 with LDD structure or an extension or an offset region or characterised by the doping profile
• CPC Class Codes: H01L 29/78636 with supplementary region or layer for improving the flatness of the device
• CPC Class Codes: H01L 29/78675 with normal-type structure, e.g. with top gate

Abstract

A semiconductor display device correcting system includes a control circuit for carrying out gamma correction of a picture signal supplied from the outside and a nonvolatile memory for storing data for gamma correction. The data for gamma correction is prepared for each semiconductor display device, so that excellent gradation display can be made.

Claims

1. An electronic device comprising:

a pixel region including a first thin film transistor over a substrate;

a source signal line side driver operationally connected to the pixel region, said source signal line side driver comprising a second thin film transistor over the substrate;

a gamma correction control circuit operationally connected to the source signal line side driver, said gamma correction control circuit comprising a third thin film transistor over the substrate; and

a nonvolatile memory operationally connected to the gamma correction control circuit, said nonvolatile memory comprising a fourth thin film transistor over the substrate.

2. The electronic device according to claim 1 wherein each of the first, second and third thin film transistors comprises a first semiconductor layer formed on an insulating surface over the substrate and a first gate electrode over the first semiconductor layer with a first gate insulator interposed therebetween while said fourth thin film transistor comprises a second semiconductor layer formed on said insulating surface, a second gate electrode over the second semiconductor layer with a second gate insulator interposed therebetween and a third gate electrode formed over the second gate electrode, said second gate electrode being electrically floating.

3. The electronic device according to claim 1 wherein said electronic device is a portable phone.

4. The electronic device according to claim 1 wherein said electronic device is a camera.

5. The electronic device according to claim 1 wherein said electronic device is a mobile computer.

6. An electronic device comprising:

a matrix of first thin film transistors over a substrate;

a source signal line side driver operationally connected to the matrix of first thin film transistors, said source signal line side driver comprising a second thin film transistor over the substrate;

a correction control circuit operationally connected to the source signal line side driver, said gamma correction control circuit comprising a third thin film transistor over the substrate; and

a nonvolatile memory operationally connected to the gamma correction control circuit, said nonvolatile memory comprising a fourth thin film transistor over the substrate.

7. The electronic device according to claim 6 wherein each of the first, second and third thin film transistors comprises a first semiconductor layer formed on an insulating surface over the substrate and a first gate electrode over the first semiconductor layer with a first gate insulator interposed therebetween while said fourth thin film transistor comprises a second semiconductor layer formed on said insulating surface, a second gate electrode over the second semiconductor layer with a second gate insulator interposed therebetween and a third gate electrode formed over the second gate electrode, said second gate electrode being electrically floating.

8. The electronic device according to claim 7 wherein said electronic device is a portable phone.

9. The electronic device according to claim 7 wherein said electronic device is a camera.

10. The electronic device according to claim 7 wherein said electronic device is a mobile computer.

11. The electronic device of claim 7 wherein a data is applied from the nonvolatile memory to the gamma correction control circuit through a D/A conversion circuit.

12. An electronic device comprising:

a pixel region including a first thin film transistor over a substrate;

a source signal line side driver operationally connected to the pixel region, said source signal line side driver comprising a second thin film transistor over the substrate;

a gamma correction control circuit operationally connected to the source signal line side driver, said gamma correction control circuit comprising a third thin film transistor over the substrate; and

a nonvolatile memory operationally connected to the gamma correction control circuit through at least first route and a second route, said nonvolatile memory comprising a fourth thin film transistor over the substrate,

wherein said first route comprises an A/D conversion circuit and said second route comprises a D/A conversion circuit.

13. The electronic device according to claim 12 wherein each of the first, second and third thin film transistors comprises a first semiconductor layer formed on an insulating surface over the substrate and a first gate electrode over the first semiconductor layer with a first gate insulator interposed therebetween while said fourth thin film transistor comprises a second semiconductor layer formed on said insulating surface, a second gate electrode over the second semiconductor layer with a second gate insulator interposed therebetween and a third gate electrode formed over the second gate electrode, said second gate electrode being electrically floating.

14. The electronic device according to claim 12 wherein said electronic device is a portable phone.

15. The electronic device according to claim 12 wherein said electronic device is a camera.

16. The electronic device according to claim 12 wherein said electronic device is a mobile computer.

17. An electronic device comprising:

a matrix of first thin film transistors over a substrate;

a source signal line side driver operationally connected to the matrix of first thin film transistors, said source signal line side driver comprising a second thin film transistor over the substrate;

a correction control circuit operationally connected to the source signal line side driver, said gamma correction control circuit comprising a third thin film transistor over the substrate; and

a nonvolatile memory operationally connected to the gamma correction control circuit through at least a first route and a second route, said nonvolatile memory comprising a fourth thin film transistor over the substrate,

wherein said first route comprises an A/D conversion circuit and said second route comprises a D/A conversion circuit.

18. The electronic device according to claim 17 wherein each of the first, second and third thin film transistors comprises a first semiconductor layer formed on an insulating surface over the substrate and a first gate electrode over the first semiconductor layer with a first gate insulator interposed therebetween while said fourth thin film transistor comprises a second semiconductor layer formed on said insulating surface, a second gate electrode over the second semiconductor layer with a second gate insulator interposed therebetween and a third gate electrode formed over the second gate electrode, said second gate electrode being electrically floating.

19. The electronic device according to claim 17 wherein said electronic device is a portable phone.

20. The electronic device according to claim 17 wherein said electronic device is a camera.

21. The electronic device according to claim 17 wherein said electronic device is a mobile computer.

22. The electronic device of claim 17 wherein a data is applied from the nonvolatile memory to the gamma correction control circuit through a D/A conversion circuit.

23. An electronic device comprising:

a pixel region including a first thin film transistor over a substrate;

a source signal line side driver operationally connected to the pixel region, said source signal line side driver comprising a second thin film transistor over the substrate;

a gamma correction control circuit operationally connected to the source signal line side driver, said gamma correction control circuit comprising a third thin film transistor over the substrate; and

a nonvolatile memory operationally connected to the gamma correction control circuit through at least a volatile memory.

24. The electronic device according to claim 23 wherein each of the first, second and third thin film transistors comprises a first semiconductor layer formed on an insulating surface over the substrate and a first gate electrode over the first semiconductor layer with a first gate insulator interposed therebetween while said fourth thin film transistor comprises a second semiconductor layer formed on said insulating surface, a second gate electrode over the second semiconductor layer with a second gate insulator interposed therebetween and a third gate electrode formed over the second gate electrode, said second gate electrode being electrically floating.

25. The electronic device according to claim 23 wherein said electronic device is a portable phone.

26. The electronic device according to claim 23 wherein said electronic device is a camera.

27. The electronic device according to claim 23 wherein said electronic device is a mobile computer.

28. An electronic device comprising:

a matrix of first thin film transistors over a substrate;

a source signal line side driver operationally connected to the matrix of first thin film transistors, said source signal line side driver comprising a second thin film transistor over the substrate;

a correction control circuit operationally connected to the source signal line side driver, said gamma correction control circuit comprising a third thin film transistor over the substrate; and

a nonvolatile memory operationally connected to the gamma correction control circuit through at least a volatile memory.

29. The electronic device according to claim 28 wherein each of the first, second and third thin film transistors comprises a first semiconductor layer formed on an insulating surface over the substrate and a first gate electrode over the first semiconductor layer with a first gate insulator interposed therebetween while said fourth thin film transistor comprises a second semiconductor layer formed on said insulating surface, a second gate electrode over the second semiconductor layer with a second gate insulator interposed therebetween and a third gate electrode formed over the second gate electrode, said second gate electrode being electrically floating.

30. The electronic device according to claim 29 wherein said volatile memory comprises a fifth thin film transistor formed on said insulating surface.

31. The electronic device according to claim 28 wherein said electronic device is a portable phone.

32. The electronic device according to claim 28 wherein said electronic device is a camera.

33. The electronic device according to claim 28 wherein said electronic device is a mobile computer.