Automotive computing devices with emergency power shut down capabilities

• US 20050044306A1
• Filed: 09/27/2004
• Published: 02/24/2005
• Est. Priority Date: 12/20/2000
• Status: Abandoned Application

• Current Assignee: Microsoft Technology Licensing LLC (Microsoft Corporation)
• Original Assignee: Microsoft Corporation
• Inventors: Drasnin, Sharon, Radko, Ronald Otto, Beckert, Richard Dennis
• Application Number:
  US10/951,302
• Publication Number:
  US 20050044306A1
• Time in Patent Office: Days
• US Class Current: 711/105
• CPC Class Codes: G06F 1/30 Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations for resetting only G06F1/24
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/3225 of memory devices
• CPC Class Codes: G06F 1/3275 Power saving in memory, e.g. RAM, cache
• CPC Class Codes: G06F 11/1441 Resetting or repowering
• CPC Class Codes: G06F 12/08 in hierarchically structured memory systems, e.g. virtual memory systems
• CPC Class Codes: G06F 2212/2022 Flash memory
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management

Abstract

Methods and systems for operating automotive computing devices are described. In one embodiment, a small amount of static RAM (SRAM) is incorporated into an automotive computing device. The SRAM is battery-backed to provide a non-volatile memory space in which critical data can be maintained in the event of a power loss. Circuitry is provided to ensure that the SRAM receives back up power from the battery at the appropriate time. Software manages the SRAM and the other storage assembly components and makes use of virtual paging or virtual addressing techniques to keep track of where various pages, including object store pages, are stored in the system. The software knows exactly where all of the object store pages are stored so that in the event of a power loss, the page locations are known and hence the pages can be used when power is restored.

Claims

1. An automotive computing device memory system comprising:

non-volatile storage means for holding object store pages for an automotive computing device;

dynamic random access memory (DRAM) means, operably associated with the non-volatile storage means, for receiving object store pages;

static random access memory (SRAM) means, operably associated with the non-volatile memory and configured for connection to a battery, for preserving one or more object pages in the event of an automotive power loss;

battery means for providing backup power to the SRAM; and

circuit means for detecting a power loss and responsive thereto operably coupling the battery with the SRAM in the event of an automotive power loss.

2. An automotive computing device comprising:

one or more microprocessors configured to be powered by a automotive voltage source;

static random access memory (SRAM) operably coupled with the one or more microprocessors, the SRAM being configured to receive one or more pages, under the influence of the one or more microprocessors, from one or more of non-volatile storage or volatile storage that can be carried by an automotive vehicle; and

a backup battery couplable with the SRAM to provide power in the event that the automotive voltage source drops out of regulation.

3. The automotive computing device of claim 2 further comprising power control circuitry associated with the SRAM and configured to determine when the automotive voltage source drops out of regulation and then automatically couple the backup battery with the SRAM.

4. The automotive computing device of claim 3, wherein the power control circuitry is configured to place the SRAM in a low power, high impedance state.

5. The automotive computing device of claim 4, wherein the power control circuitry is configured to isolate the SRAM and the backup battery from other system components.

6. The automotive computing device of claim 3, wherein the power control circuitry is configured to place the SRAM in a low power, high impedance state, and then subsequently couple the SRAM with the backup battery.

7. The automotive computing device of claim 2 further comprising non-volatile storage operably coupled with the one or more microprocessors and configured to contain an object store for the computing device.

8. The automotive computing device of claim 7, wherein the non-volatile storage comprises flash memory.

9. The automotive computing device of claim 7, wherein the volatile storage from which the SRAM is configured to receive the one or more pages comprises DRAM configured to hold read only pages from the object store.

10. The automotive computing device of claim 7, wherein the volatile storage from which the SRAM is configured to receive the one or more pages comprises DRAM configured to only hold read only pages from the object store.

11. The automotive computing device of claim 7, wherein the SRAM is configured to hold pages that have been written to.

12. The automotive computing device of claim 11, wherein the SRAM is configured to hold at least some read only pages that are written to.

13. The automotive computing device of claim 2 further comprising low voltage detection circuitry operably coupled with the one or more microprocessors and configured to detect when the automotive voltage source has dropped out of regulation and generate a signal to the microprocessor indicating the same.

14. The automotive computing device of claim 13, wherein the one or more microprocessors are configured to receive said signal and effect one or more copy operations responsive thereto.

15. The automotive computing device of claim 14, wherein said copy operations can copy pages from volatile storage to SRAM.

16. An automobile embodying the automotive computing device of claim 2.

17. A computing device comprising:

one or more SRAMs;

one or more backup batteries; and

power control circuitry configured to;

detect when a voltage powering the one or more SRAMs has dropped out of regulation; and

automatically incorporate the one or more backup batteries to power the one or more SRAMs,

wherein the computing device is compatible with an automobile.

18. The automotive computing device of claim 17, wherein the one or more backup batteries comprise one or more cell batteries.

19. The automotive computing device of claim 17, wherein the one or more backup batteries comprise one or more lithium cell batteries.

20. The automotive computing device of claim 17, wherein the power control circuitry is configured to place the one or more SRAMs in a low power state.

21. The automotive computing device of claim 17, wherein the power control circuitry is configured to isolate the one or more backup batteries and the one or more SRAMs from other system components.

22. The automotive computing device of claim 17, wherein the power control circuitry is configured to place the one or more SRAMs in a low power state before it incorporates the one or more backup batteries to power the one or more SRAMs.

23. A computing system comprising:

one or more backup batteries;

one or more SRAMs selectively couplable to the one or more backup batteries and configured to hold one or more pages that have been written to in the computing system, the one or more backup batteries being provided so that they can be coupled to the SRAM in an event of an abrupt power shut downs,

wherein the computing system is compatible with an automobile.

24. The computing system of claim 23, wherein the one or more backup batteries comprise cell batteries.

25. An automotive computing system comprising:

one or more microprocessors configured to be powered by a vehicle voltage source;

non-volatile storage coupled with the one or more microprocessors and configured to hold one or more object store pages for the computing system;

volatile storage coupled with the one or more microprocessors and configured to hold one or more object store pages that it receives from the non-volatile storage;

static random access memory (SRAM) operably coupled with the one or more microprocessors, the SRAM being configured to receive one or more pages, under the influence of the one or more microprocessors, from one or more of the non-volatile storage or volatile storage;

a backup battery couplable with the SRAM to provide power in the event that a voltage rail associated with the voltage source drops out of regulation;

low voltage detection circuitry operably coupled with the one or more microprocessors and configured to detect when the voltage rail drops below a predetermined value and generate a signal to the one or more microprocessors indicating the same; and

power control circuitry configured to;

detect when the voltage rail drops out of regulation; and

automatically incorporate the backup battery to power the SRAM.

26. A vehicle embodying the computing system of claim 25.

27. An automotive computing device data preservation method comprising:

detecting when a voltage associated with operation of an automotive vehicle drops out of regulation;

responsive to said detecting, placing an SRAM carried on the automotive vehicle in a low power state; and

backing up the SRAM with a backup battery.

28. The automotive computing device data preservation method of claim 27 further comprising placing the SRAM in the lower power state before backing up the SRAM with the backup battery.

29. The automotive computing device data preservation method of claim 27 further comprising isolating the backup battery and the SRAM from other system components.

30. The automotive computing device data preservation method of claim 27 further comprising after said detecting, writing data from DRAM carried on the automotive vehicle into the SRAM.

31. An automotive computing device data preservation method comprising:

detecting an abrupt automotive vehicle power shut down;

responsive to said detecting, placing an SRAM carried on the automotive vehicle in a low power state; and

backing up the SRAM in its low power state with a backup battery.

32. The automotive computing device data preservation method of claim 31 further comprising placing the SRAM in the lower power state before backing up the SRAM with the backup battery.

33. The automotive computing device data preservation method of claim 31 further comprising isolating the backup battery and the SRAM from other system components.

34. An automotive computing device data preservation method comprising:

maintaining an object store for the computing device in flash memory that is carried by an automotive vehicle;

writing pages of the object store into DRAM that is carried by the automotive vehicle;

writing pages of the DRAM into SRAM that is carried by the automotive vehicle in the event the DRAM pages are attempted to be written to; and

battery-backing the SRAM in the event of an abrupt power shut down condition.

35. The automotive computing device data preservation method of claim 34 further comprising detecting the abrupt power shut down condition and responsive thereto, placing the SRAM in a low power state.

36. The automotive computing device data preservation method of claim 35 further comprising placing the SRAM in the lower power state before battery-backing the SRAM.

37. The automotive computing device data preservation method of claim 34 further comprising isolating the battery-backed SRAM from other system components.

38. The automotive computing device data preservation method of claim 34 further comprising copying one or more pages from DRAM to SRAM in the event of the power shut down condition.

39. A method of operating an automotive computing device comprising:

providing an automotive computing device having flash memory that can contain read only pages, DRAM for holding pages from the flash memory, and SRAM for holding DRAM pages that are written to;

detecting when a voltage powering the SRAM drops out of regulation;

placing the SRAM in a low power state responsive to said voltage dropping out of regulation; and

backing up the SRAM with a backup battery.

40. The method of claim 39 further comprising backing up the SRAM with the backup battery after placing the SRAM in the low power state.