Asynchronous, independent and multiple process shared memory system in an adaptive computing architecture
First Claim
1. A method of controlling independent and asynchronous access to a memory by a plurality of processes, the method comprising:
- while providing for independent and asynchronous performance of a memory read process of the plurality of processes, independently and asynchronously performing a memory write process of the plurality of processes, wherein the memory write process comprises;
obtaining a first copy of a memory full indicator;
obtaining a copy of a read index, the read index copy indicating a read element position in the memory;
when the first copy of the memory full indicator indicates that the memory is not full, determining an available write count from the read index copy and a write index, the write index indicating a write element position in the memory;
beginning at the write element position, writing an amount of data corresponding to the available write count; and
updating the write index to indicate a next write element position based upon the amount of data written.
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Abstract
The present invention provides a system and method for implementation and use of a shared memory. The shared memory may be accessed both independently and asynchronously by one or more processes at corresponding nodes, allowing data to be streamed to multiple processes and nodes without regard to synchronization of the plurality of processes. The various nodes may be adaptive computing nodes, kernel or controller nodes, or one or more host processor nodes. The present invention maintains memory integrity, not allowing memory overruns, underruns, or deadlocks. The present invention also provides for “push back” after a memory read, for applications in which it is desirable to “unread” some elements previously read from the memory.
185 Citations
49 Claims
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1. A method of controlling independent and asynchronous access to a memory by a plurality of processes, the method comprising:
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while providing for independent and asynchronous performance of a memory read process of the plurality of processes, independently and asynchronously performing a memory write process of the plurality of processes, wherein the memory write process comprises;
obtaining a first copy of a memory full indicator;
obtaining a copy of a read index, the read index copy indicating a read element position in the memory;
when the first copy of the memory full indicator indicates that the memory is not full, determining an available write count from the read index copy and a write index, the write index indicating a write element position in the memory;
beginning at the write element position, writing an amount of data corresponding to the available write count; and
updating the write index to indicate a next write element position based upon the amount of data written. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A system for controlling independent and asynchronous access to a memory by a plurality of processes, the system comprising:
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a memory;
a first node coupled to the memory, the first node capable of independently and asynchronously performing a memory read process of the plurality of processes; and
a second node coupled to the memory, the second node capable of independently and asynchronously performing a memory write process, of the plurality of processes, by obtaining a first copy of a memory full indicator and obtaining a copy of a read index, the read index copy indicating a read element position in the memory;
when the first copy of the memory full indicator indicates that the memory is not full, the second node further capable of determining an available write count from the read index copy and a write index, the write index indicating a write element position in the memory;
beginning at the write element position, the second node further capable of writing an amount of data corresponding to the available write count and updating the write index to indicate a next write element position based upon the amount of data written. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23)
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24. A method of controlling independent and asynchronous access to a memory by a plurality of processes, the method comprising:
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while providing for independent and asynchronous performance of a memory write process of the plurality of processes, independently and asynchronously performing a memory read process of the plurality of processes, wherein the memory read process comprises;
obtaining a first copy of a memory full indicator;
obtaining a copy of a write index, the write index indicating a write element position in the memory;
determining an available read count from the write index copy and a read index, the read index indicating a read element position in the memory;
beginning at the read element position, reading a plurality of data elements corresponding to the available read count; and
updating the read index to indicate a next read element position. - View Dependent Claims (25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35)
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36. A system for controlling independent and asynchronous access to a memory by a plurality of processes, the system comprising:
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a memory;
a first node coupled to the memory, the first node capable of independently and asynchronously performing a memory write process of the plurality of processes; and
a second node coupled to the memory, the second node capable of independently and asynchronously performing a memory read process, of the plurality of processes, by obtaining a first copy of a memory full indicator and obtaining a copy of a write index, the write index indicating a write element position in the memory;
determining an available read count from the write index copy and a read index, the read index indicating a read element position in the memory;
beginning at the read element position, reading a plurality of data elements corresponding to the available read count and updating the read index to indicate a next read element position. - View Dependent Claims (37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48)
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49. A system for controlling independent and asynchronous access to a memory by a plurality of processes, the system comprising:
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a memory;
a first node coupled to the memory, the first node independently and asynchronously capable of obtaining a first copy of a memory full indicator and obtaining a copy of a write index, the write index indicating a write element position in the memory;
determining an available read count from the write index copy and a read index, the read index indicating a read element position in the memory;
beginning at the read element position, reading a plurality of data elements corresponding to the available read count;
the first node further capable of selecting a subset of data elements from the plurality of data elements for a subsequent read process and when selected, determining an element position corresponding to an initial data element of the subset of data elements in the memory, as a next read element position and as a next write element position, and commencing at the next write element position, writing the subset of data elements to the memory; and
the first node further capable of updating the read index to indicate the next read element position and, when the first copy of the memory full indicator indicates that the memory is full or may be full, clearing the memory full indicator to indicate that the memory is not full; and
a second node coupled to the memory, the second node independently and asynchronously capable of obtaining a second copy of the memory full indicator and obtaining a copy of the read index;
when the second copy of the memory full indicator copy indicates that the memory is not full, determining an available write count from the read index copy and the write index;
beginning at the write element position indicated by the write index, writing an amount of data corresponding to the available write count;
updating the write index to indicate a next write element position based upon the amount of data written; and
when the updated write index is equal to the read index copy, of setting the memory full indicator to indicate that the memory is full or may be full.
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Specification