Semiconductor package structure and method for manufacturing the same

• US 20050046046A1
• Filed: 10/13/2004
• Published: 03/03/2005
• Est. Priority Date: 11/13/2002
• Status: Abandoned Application

• Current Assignee: Advanced Semiconductor Engineering Inc (ASE Technology Holding Co., Ltd.)
• Original Assignee: Advanced Semiconductor Engineering Inc (ASE Technology Holding Co., Ltd.)
• Inventors: Chiu, Chi-Tsung, Wu, Sung-Mao, Tao, Su
• Application Number:
  US10/962,564
• Publication Number:
  US 20050046046A1
• Time in Patent Office: Days
• US Class Current: 257/787
• CPC Class Codes: H01L 2223/6611 Wire connections
• CPC Class Codes: H01L 2223/6622 Coaxial feed-throughs in active or passive substrates
• CPC Class Codes: H01L 2224/45144 Gold (Au) as principal constituent
• CPC Class Codes: H01L 2224/45572 Two-layer stack coating
• CPC Class Codes: H01L 2224/45599 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48227 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/484 Connecting portions
• CPC Class Codes: H01L 2224/48599 Principal constituent of the connecting portion of the wire connector being Gold (Au)
• CPC Class Codes: H01L 2224/83 using a layer connector
• CPC Class Codes: H01L 2224/8592 Applying permanent coating, e.g. protective coating
• CPC Class Codes: H01L 23/29 characterised by the material , e.g. carbon interlayer dielectrics H01L23/5329
• CPC Class Codes: H01L 23/3121 a substrate forming part of the encapsulation
• CPC Class Codes: H01L 23/552 Protection against radiation, e.g. light or electromagnetic waves
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/83 using a layer connector
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01047 Silver [Ag]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/05442 : SiO2
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/30105 : Capacitance
• CPC Class Codes: H01L 2924/30107 : Inductance
• CPC Class Codes: H01L 2924/3011 : Impedance
• CPC Class Codes: H01L 2924/3025 : Electromagnetic shielding

Abstract

A semiconductor package structure includes a substrate, a semiconductor die, a plurality of wires, and a molding compound. In this case, the semiconductor die is attached to the substrate. Each of the wires respectively has a center conductive layer, a dielectric layer, and a metal layer. Each of the center conductive layers connects the semiconductor die to the substrate. Each of the dielectric layers covers each of the center conductive layers, and the metal layers cover the dielectric layers. The molding compound encapsulates the semiconductor die and the wires. This invention also provides another semiconductor package structure, including a substrate, a semiconductor die, a plurality of wires, and a conductive molding compound. Each of the wires respectively has a center conductive layer and a dielectric layer. The conductive molding compound is made of a conductive material. Furthermore, the invention also provides a method for manufacturing the semiconductor package structure.

Claims

1. A semiconductor package structure, comprising:

a substrate;

a semiconductor die attached to the substrate;

a plurality of wires, each of the wires having a center conductive layer connecting the substrate to the semiconductor die, a dielectric layer covering the center conductive layer and a metal layer covering the dielectric layer; and

a molding compound encapsulating the semiconductor die and the wires.

2. The semiconductor package structure of claim 1, wherein the substrate further comprises a ground plan electrically connecting to the metal layer.

3-4. -4. (canceled).

5. A method for manufacturing a semiconductor package structure, comprising:

providing a semiconductor die on a substrate;

forming a plurality of center conductive layers to connect the substrate to the semiconductor die;

forming a plurality of dielectric layers to cover the center conductive layers;

forming a plurality of metal layers to cover the dielectric layers; and

forming a molding compound to encapsulate the semiconductor die and the metal layers.

6. The method of claim 5, wherein the substrate comprises a ground plan, the method further comprising:

electrically connecting the metal layers to the ground plan.