System to process packets according to an assigned sequence number

• US 20050047439A1
• Filed: 08/26/2003
• Published: 03/03/2005
• Est. Priority Date: 08/26/2003
• Status: Abandoned Application

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Madajczak, Tomasz Bogdan
• Application Number:
  US10/647,984
• Publication Number:
  US 20050047439A1
• Time in Patent Office: Days
• US Class Current: 370/469
• CPC Class Codes: H04J 3/1617 carrying packets or ATM cells
• CPC Class Codes: H04L 47/34 ensuring sequence integrity, e.g. using sequence numbers

Abstract

According to some embodiments, a portion of a network packet is received, a sequence number is retrieved, a sequence number is passed to a sequence election unit, a signal to process the packet is received from the sequence election unit, and processing is performed on the packet in response to receipt of the signal.

Claims

1. A method comprising:

receiving a portion of a network packet;

retrieving a sequence number;

passing the sequence number to a sequence election unit;

waiting to receive a signal to process the packet from the sequence election unit; and

performing processing on the packet in response to receipt of the signal.

2. A method according to claim 1, further comprising:

indicating to the sequence election unit that the processing is complete.

3. A method according to claim 1, wherein the processing must be performed in group order.

4. A method according to claim 1, wherein the processing comprises a critical section of a packet processing pipeline.

5. A method according to claim 1, further comprising:

requesting the signal from the sequence election unit.

6. A method according to claim 1, wherein passing the sequence number further comprises:

passing a mask associated with the sequence number to the sequence election unit.

7. A method according to claim 6, wherein the mask indicates a group of threads designated to perform the processing.

8. A method according to claim 7, wherein the group of threads comprises execution threads of two or more packet processing engines.

9. A medium storing program code, the program code executable to:

receive a portion of a network packet;

retrieve a sequence number;

pass the sequence number to a sequence election unit;

wait to receive a signal to process the packet from the sequence election unit; and

perform processing on the packet in response to receipt of the signal.

10. A medium according to claim 9, wherein the program code executable to pass the sequence number comprises program code executable to:

pass a thread mask associated with the sequence number to the sequence election unit.

11. A medium according to claim 10, wherein the thread mask indicates a group of threads designated to perform the processing.

12. A medium according to claim 11, wherein the group of threads comprises execution threads of two or more packet processing engines.

13. A method comprising:

receiving a sequence number associated with an execution thread;

receiving a request for election from the execution thread;

determining whether the sequence number is less than sequence numbers associated with a respective other one or more execution threads; and

transmitting an election signal to the execution thread if it is determined that the sequence number is less than the sequence numbers associated with the respective other one or more execution threads.

14. A method according to claim 13, further comprising:

associating the sequence number with a mask.

15. A method according to claim 14, wherein the one or more other threads are associated with the mask.

16. A method according to claim 15, wherein the mask indicates a group of threads designated to perform particular processing.

17. A method according to claim 13, further comprising:

receiving an indication of completed processing from the execution thread.

18. A method according to claim 17, further comprising:

determining a second execution thread of the other one or more execution threads that is associated with a second sequence number that is less than sequence numbers associated with each other of the other one or more execution threads; and

transmitting an election signal to the second execution thread.

19. A method according to claim 18, wherein the one or more other threads are associated with a mask.

20. A method according to claim 13, further comprising:

swapping out the thread if it is determined that the sequence number is not less than the sequence numbers associated with the respective other one or more execution threads.

21. A medium storing program code, the program code executable to:

receive a sequence number associated with an execution thread;

receive a request for election from the execution thread;

determine whether the sequence number is less than sequence numbers associated with a respective other one or more execution threads; and

transmit an election signal to the execution thread if it is determined that the sequence number is less than the sequence numbers associated with the respective other one or more execution threads.

22. A medium according to claim 21, the program code further executable to:

receive an indication of completed processing from the execution thread;

determine a second execution thread of the other one or more execution threads that is associated with a second sequence number that is less than sequence numbers associated with each other of the other one or more execution threads; and

transmit an election signal to the second execution thread.

23. A medium according to claim 21, the program code further executable to:

swap out the thread if it is determined that the sequence number is not less than the sequence numbers associated with the respective other one or more execution threads.

24. A method comprising:

receiving a sequence number associated with an execution thread;

determining whether a processing sequence associated with the sequence number is locked; and

transmitting an election signal to the execution thread if it is determined that the processing sequence is not locked.

25. A method according to claim 24, further comprising:

receiving an indication of completed processing from the execution thread.

26. A method according to claim 25, further comprising:

determining a second execution thread of another one or more execution threads that is associated with a second sequence number that is less than sequence numbers associated with each other of the other one or more execution threads; and

transmitting an election signal to the second execution thread.

27. A method according to claim 26, wherein the execution thread and the another one or more threads are associated with a mask.

28. A method according to claim 26, wherein the another one or more threads are designated as stalled threads from which respective sequence numbers were previously received.

29. A method according to claim 24, further comprising:

designating the execution thread as a stalled thread if it is determined that the processing sequence is locked.

30. A method according to claim 24, wherein the processing sequence comprises a critical section of a packet processing pipeline.

31. A medium storing program code, the program code executable to:

receive a sequence number associated with an execution thread;

determine whether a processing sequence associated with the sequence number is locked; and

transmit an election signal to the execution thread if it is determined that the processing sequence is not locked.

32. A medium according to claim 31, the program code further executable to:

receive an indication of completed processing from the execution thread;

determine a second execution thread of another one or more execution threads that is associated with a second sequence number that is less than sequence numbers associated with each other of the other one or more execution threads; and

transmit an election signal to the second execution thread.

33. A device comprising:

a packet processing engine to provide a plurality of execution threads;

a sequence number register to provide a respective sequence number to one or more of the plurality of execution threads; and

a sequence election unit to elect one of the one or more of the plurality of execution threads based on sequence numbers provided to the one or more of the plurality of execution threads.

34. A device according to claim 33, the sequence election unit further to transmit an election signal to the elected one of the one or more of the plurality of execution threads.

35. A device according to claim 33, the sequence election unit further to associate the one or more of the plurality of execution threads with a mask.

36. A device according to claim 35, wherein the mask indicates a group of threads designated to perform particular processing.

37. A device according to claim 33, the sequence election unit further to receive a sequence number associated with an execution thread of the one or more of the plurality of execution threads, to determine whether a processing sequence associated with the sequence number is locked, and to transmit an election signal to the execution thread if it is determined that the processing sequence is not locked.

38. A device according to claim 37, the sequence election unit further to receive an indication of completed processing from the execution thread, to determine a second execution thread of the one or more of the plurality of execution threads that is associated with a second sequence number that is less than sequence numbers associated with each other of the one or more of the plurality of execution threads, and to transmit an election signal to the second execution thread.

39. A device according to claim 33, further comprising a network processor comprising the packet processing engine, the sequence number register, and the sequence election unit.

40. A system according to claim 39, wherein the network processor further comprises two or more packet processing engines.

41. A system comprising:

a packet processing engine to provide a plurality of execution threads;

a sequence number register to provide a respective sequence number to one or more of the plurality of execution threads;

a sequence election unit to elect one of the one or more of the plurality of execution threads based on sequence numbers provided to the one or more of the plurality of execution threads; and

a Double Data Rate memory.

42. A system according to claim 41, further comprising a network processor comprising the packet processing engine, the sequence number register, and the sequence election unit.

43. A system according to claim 42, wherein the network processor further comprises two or more packet processing engines.

44. A system according to claim 41, the sequence election unit further to receive a sequence number associated with an execution thread of the one or more of the plurality of execution threads, to determine whether a processing sequence associated with the sequence number is locked, to transmit an election signal to the execution thread if it is determined that the processing sequence is not locked, to receive an indication of completed processing from the execution thread, to determine a second execution thread of the one or more of the plurality of execution threads that is associated with a second sequence number that is less than sequence numbers associated with each other of the one or more of the plurality of execution threads, and to transmit an election signal to the second execution thread.