Integrated input/output controller

• US 20050050240A1
• Filed: 08/06/2004
• Published: 03/03/2005
• Est. Priority Date: 11/17/2000
• Status: Active Grant

• Current Assignee: Adaptec Incorporated (Steel Partners Holdings LP)
• Original Assignee: Marc Acosta, Robert Horn, Sanjay Mathur, Virgil Wilkins
• Inventors: Mathur, Sanjay, Acosta, Marc, Horn, Robert, Wilkins, Virgil
• Granted Patent: US 7,404,021 B2
• Time in Patent Office: Days
• US Class Current: 710/15
• CPC Class Codes: G06F 3/0613 in relation to throughput
• CPC Class Codes: G06F 3/0653 Monitoring storage devices or systems
• CPC Class Codes: G06F 3/0659 Command handling arrangements, e.g. command buffers, queues, command scheduling
• CPC Class Codes: G06F 3/0665 at area level, e.g. provisioning of virtual or logical volumes
• CPC Class Codes: G06F 3/067 Distributed or networked storage systems, e.g. storage area networks [SAN], network attached storage [NAS]

Abstract

An integrated I/O controller in an integrated circuit is provided for centralized data management. The integrated circuit includes a host interface, a disk interface, and a mapping controller implemented in hardware to speed data processing and provide fault tolerance as exemplified with RAID configurations. The mapping controller provides block mapping across a plurality of peripherals or disk drives in a disk array. The integrated I/O controller can be utilized in storage area network systems and network area storage systems as well as other networking systems or devices.

Claims

1. An integrated I/O controller integrated into a single integrated circuit device for transceiving data as a plurality of data blocks between at least one host and a disk array, comprising:

a host interface subsystem coupled to at least one host for receiving host commands and tranceiving said data blocks with the at least one host in response to the host commands, said host interface system including a command decode controller for parsing host commands to identify data flow type host commands and non data flow type commands;

a RAID mapping controller, coupled to the host interface subsystem, for mapping logical block addresses of the data flow type host commands into disk block addresses of a plurality of disks of a RAID disk array; and

a disk interface subsystem, coupled to said plurality of disks of said disk array for transceiving said data blocks with the plurality of disks using the disk block addresses generated by the mapping controller;

wherein,

for each data flow type host command,

said command decode controller communicates an associated logical block address to the mapping controller,

said mapping controller converts the associated logical block address to an associated disk block address, and

said disk interface subsystem accesses the plurality of disks using said associated disk block address.

2. The integrated I/O controller of claim 1, wherein:

said host commands are high level I/O commands received from a host;

said command decode controller includes circuits for parsing the high level I/O commands to determine whether to read or write data;

said mapping controller includes circuits for mapping the high level I/O request into one or more peripheral I/O commands, the one or more peripheral I/O commands indicating which of the one or more peripherals and which respective data locations are to be accessed; and

said peripheral interface subsystem includes circuits for servicing the high level I/O request by reading or writing data between the host and the one or more peripherals using the respective data locations.

3. The integrated I/O controller of claim 2, further including circuits to perform:

prior to servicing the high level I/O request, storing data temporarily into an external cache buffer from the data flow between the host and the one or more disks.

4. The integrated I/O controller of claim 2, wherein each of the one or more peripheral I/O commands further indicates the number of blocks of data to be serviced.

5. The integrated I/O controller of claim 2, wherein said mapping controller includes circuits to perform:

parsing a high level command from an I/O request packet,

decoding the high level command and generating a range operation request in response thereto, and

generating the one or more peripheral I/O commands in response to the range operation request.

6. The integrated I/O controller of claim 2, wherein each of the one or more peripheral I/O commands are Small Computer System Interface (SCSI) disk I/O commands.

7. The integrated I/O controller of claim 2, wherein the high level I/O command is a command of a Small Computer System Interface (SCSI) Command Descriptor Block (CDB) standard.

8. The integrated I/O controller of claim 2, wherein the circuits of the integrated I/O controller are hard wired circuits.

9. The integrated I/O controller of claim 2, wherein the circuits of the integrated I/O controller are microcoded circuits and state machines operating concurrently.

10. The integrated I/O controller of claim 2, wherein the circuits of the integrated I/O controller are hard wired circuits, microcoded circuits and state machines operating concurrently.

11. The integrated I/O controller of claim 2, wherein the circuits of the integrated I/O controller are programmable micro-controllers operating concurrently.

12. The integrated I/O controller of claim 1, further comprising a micro-controller subsystem coupled to the host interface subsystem for processing non data flow type host commands.

13. The integrated I/O controller of claim 1, further comprising:

a cache manager coupled to the host interface subsystem and the peripheral interface subsystem for managing entries in a cache buffer to temporarily store data of the data flow between the disk and the host.

14. The integrated I/O controller of claim 1, further comprising:

a buffer manager coupled to the host interface subsystem, the peripheral interface subsystem, and the cache manager, for managing data storage in the cache buffer.

15. The integrated I/O controller of claim 1, wherein the host interface subsystem includes a host exchange controller to control the physical connection and protocol of the host.

16. The integrated I/O controller of claim 1, wherein the disk interface subsystem includes a disk exchange controller to control the physical connection and protocol of the disk.

17. The integrated I/O controller of claim 1, wherein the disk interface subsystem includes a Fibre channel disk port to transceive data with the disk using a Fibre channel protocol.

18. The integrated I/O controller of claim 1, further comprising a micro-controller coupled to the host interface subsystem, the micro-controller to perform initialization and handle error and exception handling events.

19. The integrated I/O controller of claim 1, wherein the host interface subsystem includes a fibre channel host port to transceive data with the at least one host using a fibre channel protocol.

20. The integrated I/O controller of claim 1, wherein the command decode controller further validates a host command and initiates execution of the host command by the integrated I/O controller.

21. The integrated I/O controller of claim 1, wherein the command decode controller maintains a command queue for each volume accessible by the at least one host to further validate a host command and to queue the host command for execution.

22. The integrated I/O controller of claim 1, wherein the command decode controller further validates a host command and, if the host command is determined to be invalid, the host command is passed to a micro-controller subsystem for processing as a non data flow command.

23. The integrated I/O controller of claim 1, wherein the host commands are high level input/output requests.

24. The integrated I/O controller of claim 16, wherein the one or more disks of the at least one array of disks are magnetic storage media, optical storage media or semiconductor storage media.

25. The integrated I/O controller of claim 1, wherein the disk interface subsystem includes one or more fibre channel disk ports to transceive data with the one or more disks of the at least one disk array using a fibre channel protocol.

26. The integrated I/O controller of claim 1, wherein the mapping controller is programmable hardware to flexibly control the mapping of blocks of data storage on the one or more disks of the at least one disk array.

27. The integrated I/O controller of claim 26, wherein the mapping controller receives a requested command input packet to generate expanded command output packets in response thereto, the requested command input packet functions as a logical address and the expanded command output packets function as physical addresses.

28. The integrated I/O controller of claim 26, further comprising a buffer manager and a cache manager, the buffer manager and the cache manager being coupled, respectively, to a cache buffer and a cache table buffer, for flexibly controlling the reading and writing of data to and from the mapped data storage on the one or more disks of the at least one disk array.

29. The integrated I/O controller of claim 1, wherein the mapping controller comprises:

a mapping engine to map high level host I/O requests into low level I/O commands; and

a low level command manager to manage data read and data write accesses into and out of a disk in response to the low level I/O commands.

30. The integrated I/O controller of claim 1, further comprising a buffer manager to arbitrate access by the one or more servers and to control data reads and data writes into and out of a buffer memory.

31. The integrated I/O controller of claim 1, further comprising a micro-controller to handle non-data flow commands, system initialization and error handling exception conditions.

32. The controller of claim 1, wherein the data flow type host commands comprise read and write commands.

33. The controller of claim 1, further comprising a cache manager for communicating with a cache memory.

34. The controller of claim 33, wherein said cache manager determines whether data corresponding to said associated logical block address is stored in the cache memory before said command decode subsystem communicates said associated logical block address to said mapping controller, and if data corresponding to said logical block address is stored in the cache memory, said host command is processed using said cache memory and said command decode subsystem does not communicate said associated logical block address to said mapping controller.

35. The integrated I/O controller of claim 13, wherein said host exchange controller maintains a host exchange table comprising a plurality of table entries, receives a host command, and adds a new table entry to said host exchange table corresponding to said host command, each table entry being associated with a tag, and outputs the tag associated with the new table entry;

and

said command decode controller maintains a command queue comprising a plurality of queue entries, receives the tag associated with the new table entry, adds a new queue entry corresponding to said tag, and outputs a cache manager packet; and

said cache manager subsystem manages a cache memory, wherein said cache manager subsystem performs the steps of;

receiving the cache manager packet, if data associated with said cache manager packet is stored in the cache memory;

forwarding read data from the cache to the host exchange controller if the host command is a read command;

accepting write data from the host exchange controller if the host command is a write command; and

if data associated with said cache manager packet is not stored in the cache memory, forwarding a logical block address associated with said cache manager packet to the mapping controller to receive an associated disk block address, said disk interface subsystem accessing at least one disk using said associated disk peripheral block address.

36. The integrated I/O controller of claim 35, wherein data flow host commands comprise read and write commands.

37. The integrated I/O controller of claim 35, wherein said mapping controller is capable of accepting a logical block address for a virtual volume which spans a plurality of disks and translating said logical block address to an associated disk block address.

38. The integrated I/O controller of claim 1, wherein said disk interface subsystem also transceives at least one additional block when said disk interface subsystem transceives said data block with said plurality of disks.

39. The integrated I/O controller of claim 38, wherein said at least one additional block comprises parity information regarding at least said data block.

40. The integrated I/O controller of claim 39, wherein said at least one block comprises a copy of said data block.

41. The integrated I/O controller of claim 1, wherein said mapping controller converts the associated logical block address to an associated disk block address in accordance with a mapping which stripes data across said plurality of disks.

42. The integrated I/O controller of claim 1, wherein said mapping controller converts the associated logical block address to an associated disk block address in accordance with a mapping which mirrors data across said plurality of disks.

43. The integrated I/O controller of claim 1, wherein said mapping controller converts the associated logical block address to an associated disk block address in accordance with a mapping which mirrors and stripes data across said plurality of disks.

44. The integrated I/O controller of claim 1, wherein said disk interface subsystem comprises a SCSI initiator.

45. The integrated I/O controller of claim 1, wherein said disk array is organized as a plurality of logical volumes and said controller independently processes commands directed said plurality of logical volumes.