Low noise charge pump method and apparatus

• US 20050052220A1
• Filed: 09/08/2003
• Published: 03/10/2005
• Est. Priority Date: 09/08/2003
• Status: Active Grant

• Current Assignee: pSemi Corporation (Murata Manufacturing Co Limited)
• Original Assignee: Peregrine Semiconductor Corporation (Murata Manufacturing Co Limited)
• Inventors: Burgener, Mark L., Cable, James S., Kelly, Dylan
• Granted Patent: US 7,719,343 B2
• Time in Patent Office: Days
• US Class Current: 327/536
• CPC Class Codes: H02M 3/07 using capacitors charged and discharged alternately by semiconductor devices with control electrode , e.g. charge pumps
• CPC Class Codes: H02M 3/073 Charge pumps of the Schenkel-type
• CPC Class Codes: H03K 3/013 Modifications of generator to prevent operation by noise or interference
• CPC Class Codes: H03K 3/0315 Ring oscillators

Abstract

A charge pump method and apparatus is described having various aspects. Noise injection from a charge pump to other circuits may be reduced by limiting both positive and negative clock transition rates, as well as by limiting drive currents within clock generator driver circuits, and also by increasing a control node AC impedance of certain transfer capacitor coupling switches. A single-phase clock may be used to control as many as all active switches within a charge pump, and capacitive coupling may simplify biasing and timing for clock signals controlling transfer capacitor coupling switches. Any combination of such aspects of the method or apparatus may be employed to quiet and/or simplify charge pump designs over a wide range of charge pump architectures.

Claims

1. Charge pump apparatus for generating an output voltage supply within a circuit, comprising:

a) a transfer capacitor;

b) a plurality of transfer capacitor coupling switches, each switchable between a conducting state and a nonconducting state under control of a charge pump clock output;

c) a charge pump clock generating circuit including

i) circuitry configured to limit a rate of rise of the charge pump clock output, and

ii) circuitry configured to limit a rate of fall of the charge pump clock output;

d) wherein the transfer capacitor coupling switches are coupled to the transfer capacitor, and are controlled so as to couple the transfer capacitor to a voltage source during periodic first times, and to couple the transfer capacitor to the output voltage supply during periodic second times that are not concurrent with the first times.

2. The apparatus of claim 1, wherein the plurality of transfer capacitor coupling switches are under control of the charge pump clock output.

3. The apparatus of claim 1, further comprising a current source limit device configured to limit the rate of rise of the charge pump clock output.

4. The apparatus of claim 1, further comprising a current sink limit device configured to limit the rate of fall of the charge pump clock output.

5. The apparatus of claim 1, further comprising a capacitive coupling circuit configured to couple the charge pump clock output to a control node of a transfer capacitor coupling switch.

6. The apparatus of claim 5, further comprising corresponding capacitive coupling circuits to couple a control node of each of the plurality of transfer capacitor coupling switches to a common charge pump clock output.

7. The apparatus of claim 6, further comprising circuitry configured to limit currents conducted by each amplifying driver circuit within the charge pump clock generating circuit.

8. The apparatus of claim 1, further comprising circuitry configured to limit currents conducted by each amplifying driver circuit within the charge pump clock generating circuit.

9. The apparatus of claim 1, further comprising circuitry configured to limit source and sink currents, conducted by an amplifying driver circuit within the charge pump clock generating circuit, to substantially identical magnitudes.

10. The apparatus of claim 1, further comprising coupling the transfer capacitor to the voltage source via the charge pump clock output.

11. The apparatus of claim 1, wherein the transfer capacitor coupling switches b) include:

i) a common discharge switch disposed between a terminal of the transfer capacitor and a common reference connection of the output voltage supply, and having a first control node AC impedance, and

ii) an output supply discharge switch disposed between an opposite terminal of the transfer capacitor and a connection of the output voltage supply opposite the common reference connection, and having a second control node AC impedance at least twice the first control node AC impedance.

12. Charge pump apparatus for generating an output voltage supply within a circuit, comprising:

a) a transfer capacitor coupled alternately between source connections and output connections;

b) a plurality of active switches, each switchable between a conducting state and a nonconducting state under control of a charge pump clock output;

c) a charge pump clock generating circuit including an active driver circuit configured to both source current to a driver output node and sink current from the driver output node, the charge pump clock generating circuit further including

i) circuitry configured to limit source current provided by the active driver circuit to the driver output node, and

ii) circuitry configured to limit current sunk from the driver output node by the active driver circuit.

13. The apparatus of claim 12, wherein the charge pump clock generating circuit c) further comprises a discrete capacitive element coupled to the driver output node and configured to reduce voltage rates of change at the driver output node.

14. The apparatus of claim 12, wherein the charge pump clock generating circuit includes a plurality of active driver circuits configured to both source and sink current with respect to a corresponding driver output node, and wherein the charge pump clock generating circuit includes circuitry to limit the current source capacity of each active driver circuit and circuitry to limit the current sink capacity of each active driver circuit with respect to the corresponding driver output node.

15. The apparatus of claim 12, further comprising one or more capacitive coupling networks configured to couple a charge pump clock output signal to a control node of an active switch.

16. The apparatus of claim 12, wherein the charge pump clock generating circuit is configured as a current-starved ring oscillator.

17. The apparatus of claim 12, wherein the source current circuitry c) i) and the sink current circuitry c) ii) are configured to limit source and sink currents to a substantially identical magnitude.

18. Charge pump apparatus for generating an output voltage supply within a circuit, comprising:

a) a transfer capacitor;

b) one or more source switching devices disposed in series between the transfer capacitor and a voltage source;

c) one or more output switching devices disposed in series between the transfer capacitor and the output voltage supply; and

d) a charge pump clock generating circuit configured to provide a single-phase charge pump clock output coupled to all of the source switching devices to cause conduction during charge periods and nonconduction during discharge periods for all of the source switching devices, the charge pump clock output further coupled to all of the output switching devices to cause nonconduction during the charge periods and conduction during the discharge periods for all of the output switching devices, wherein the charge periods alternate with, and do not overlap, the discharge periods.

19. The apparatus of claim 18, further comprising a second charge pump stage including:

e) a second transfer capacitor;

f) one or more second-source switching devices disposed in series between the second transfer capacitor and a second voltage source; and

g) one or more second-output switching devices disposed in series between the second transfer capacitor and a second output voltage supply;

h) wherein the charge pump clock output is coupled to all of the second-source switching devices to cause conduction during the charge periods and nonconduction during the discharge periods, and is coupled to all of the second-output switching devices to cause nonconduction during the charge periods and conduction during the discharge periods.

20. The apparatus of claim 18, further comprising circuitry configured to reduce voltage change rates of the charge pump clock output during both positive and negative transitions compared to an absence of such circuitry.

21. The apparatus of claim 18, wherein a first output switching device having a first device area is disposed between a first terminal of the transfer capacitor and the output voltage supply;

and further comprising a second output switching device disposed between a common reference connection of the output voltage supply and a second terminal of the transfer capacitor opposite the first terminal of the transfer capacitor, having a second device area that is greater than double the first device area.

22. The apparatus of claim 18, further comprising a charge pump clock generating circuit including circuitry configured to limit currents conducted by each amplifying driver circuit in the charge pump clock generating circuit.

23. The apparatus of claim 22, further comprising a discrete capacitive device coupled to an amplifying driver circuit output to limit a rate of change of the driver circuit voltage output.

24. Charge pump apparatus for generating an output voltage supply within a circuit, comprising:

a) a transfer capacitor;

b) one or more source switching devices disposed in series between the transfer capacitor and a voltage source and having a corresponding control node;

c) one or more output switching devices disposed in series between the transfer capacitor and the output voltage supply and having a corresponding control node;

d) a capacitive coupling circuit coupling a charge pump clock output to a control node corresponding to a source switching device or to an output switching device.

25. The apparatus of claim 24, comprising a first capacitive coupling circuit coupling a charge pump clock output to a source switching device control node, and a second capacitive coupling circuit coupling the charge pump clock output to an output switching device control node.

26. The apparatus of claim 25, wherein each capacitive coupling circuit includes biasing circuitry configured such that an average control voltage causes a switching device to which it is coupled to be substantially nonconductive.

27. The apparatus of claim 25, wherein all source switching devices disposed in series between the transfer capacitor and a voltage source, and all output switching devices disposed in series between the transfer capacitor and an output voltage, are capacitively coupled to a common clock output.

28. A method of generating an output supply from a charge pump by transferring charge from a source voltage to a transfer capacitor (“

TC”

) alternately with transferring charge from the TC to the output supply, wherein a TC-coupling switch (“

TCCS”

) circuit is a switching circuit of the charge pump configured to couple the TC to a supply under control of a charge pump clock, the method comprising;

a) coupling the TC to the output supply during discharge periods via a discharging TCCS circuit under control of a first charge pump clock output; and

b) actively limiting a rate of voltage change of the first charge pump clock output during both positive transitions and negative transitions.

29. The method of claim 28, further comprising

c) coupling the TC to the source voltage via a charging TCCS circuit, under control of a second charge pump clock output, during charge periods that nonoverlappingly alternate with the discharge periods;

and

d) actively limiting a rate of voltage change of both positive and negative transitions of the second charge pump clock output.

30. The method of claim 29, wherein the first charge pump clock output is the second charge pump clock output.

31. The method of claim 30, further comprising controlling all TCCS circuits by means of the first charge pump output.

32. The method of claim 31, further comprising coupling the TC to a connection of the voltage source during a charging period via the charge pump clock output.

33. The method of claim 28, further comprising limiting a current drive capacity of the charge pump clock output by means of a current limiting circuit.

34. The method of claim 28, further comprising coupling the first charge pump clock output to a control node of a TCCS circuit via a capacitive coupling circuit.

35. The method of claim 28, wherein actively controlled TCCS circuits have a control node, the method further comprising coupling a control node of each actively controlled TCCS circuit to the first charge pump clock output via a corresponding capacitive coupling circuit.

36. The method of claim 28, wherein a first clock generator driver circuit is a driver circuit functionally incorporated in a circuit configured to generate the first charge pump clock output, the method further comprising:

c) limiting source currents from a clock generator driver circuit by means of a first current limiting circuit; and

d) limiting sink currents into the clock generator driver circuit by means of a second current limiting circuit.

37. The method of claim 36, further comprising limiting the source current and the sink current of the clock generator driver circuit to substantially identical magnitudes.

38. The method of claim 36, wherein the first current limiting circuit comprises a current mirror device, and the second current limiting circuit comprises a different current mirror device.

39. The method of claim 37, further comprising limiting source currents and sink currents from all first clock generator driver circuits.

40. The method of claim 28, further comprising generating the first charge pump clock output by means of a current-starved ring oscillator.

41. The method of claim 28, further comprising coupling the TC to the source voltage or to the output supply in part via a passive TCCS circuit.

42. The method of claim 28, further comprising coupling a first terminal of the TC to a common reference connection of the output supply via a discharge common TCCS;

coupling a second opposite terminal of the TC to an output, supply connection opposite the common reference connection via a discharge output TCCS; and

fabricating the discharge output TCCS to have a control node AC impedance at least double a control node AC impedance of the discharge common TCCS.

43. A method of generating an output supply by alternately transferring charge from a source voltage to a transfer capacitor (“

TC”

), and from the TC to the output supply, the method comprising;

a) coupling the TC to the output supply during discharge periods via a discharging switch circuit under control of a first charge pump clock output;

b) limiting source current provided to a driver output node by a driver circuit within a first charge pump clock generator circuit by means of a source limiting circuit; and

c) limiting sink current drawn from the driver output node by the driver circuit by means of a sink limiting circuit.

44. The method of claim 43, further comprising

d) coupling the TC to the source voltage via a charging switch circuit, under control of a second charge pump clock output, during charge periods alternating nonconcurrently with the discharge periods.

45. The method of claim 43, further comprising coupling a capacitor to the driver node of the first charge pump clock generating circuit to limit voltage transition rates of the driver node.

46. The method of claim 43, further comprising limiting currents sourced by each driver circuit within the first charge pump clock generating circuit.

47. The method of claim 45, further comprising limiting currents sunk by each driver circuit within the first charge pump clock generating circuit.

48. The method of claim 43, further comprising configuring the first charge pump clock generator circuit as a current-starved oscillator.

49. A method of generating an output supply by alternately transferring charge from a source voltage to a transfer capacitor (“

TC”

), and from the TC to the output supply, the method comprising;

a) coupling the TC to the output supply during discharge periods via a TC discharging switch under control of a single phase charge pump clock output; and

b) coupling the TC to the voltage source via a TC charging switch, during charge periods that nonoverlappingly alternate with the discharge periods, under control of the single-phase charge pump clock output.

50. The method of claim 49, wherein step a) further comprises coupling the TC to the output supply during discharge periods via a plurality of TC discharging switches under control of the single phase charge pump clock output.

51. The method of claim 50, wherein step b) further comprises coupling the TC to a voltage source via a plurality of TC charging switches under control of the single phase charge pump clock output.

52. The method of claim 50, further comprising:

c) coupling a first TC discharging switch device in series between a first node of the TC and a common reference connection of the output supply;

d) coupling a second TC discharging switch in series between a second node of the TC opposite the first node and a connection of the output supply opposite the common reference connection; and

e) fabricating the second TC discharging switch to have a control node AC impedance at least twice as large as a control node AC impedance of the first discharging switch device.

53. The method of claim 49, wherein step b) further comprises coupling the TC to a voltage source via a plurality of TC charging switches under control of the single phase charge pump clock output.

54. The method of claim 49, further comprising:

c) coupling a second TC to a second voltage source via a second TC charging switch under control of the charge pump clock output; and

d) coupling the second TC to a second output supply via a second TC discharging switch under control of the charge pump clock output.

55. The method of claim 54, further comprising coupling the charge pump clock output to a control node of each actively controllable TC charging switch, and to each actively controllable TC discharging switch, via corresponding capacitive coupling circuits.

56. The method of claim 49, further comprising coupling the charge pump clock output to a control node of each actively controllable TC charging switch, and to each actively controllable TC discharging switch, via corresponding capacitive coupling circuits.

57. The method of claim 49, further comprising incorporating circuitry to reduce voltage change rates during both positive and negative transitions of the charge pump clock output.

58. The method of claim 49, further comprising:

c) generating the charge pump clock output in a charge pump clock generator circuit having one or more driver circuits, and

d) limiting currents output from each driver circuit of the charge pump clock generator circuit.

59. The method of claim 58, further comprising:

e) limiting rates of both positive and negative voltage transitions at an output node of a driver circuit of the charge pump clock generator circuit by coupling a capacitor to the output node of the driver circuit.

60. A method of generating an output supply by alternately transferring charge from a source voltage to a transfer capacitor (“

TC”

), and from the TC to the output supply, the method comprising;

a) coupling a first charge pump clock output to a control node of a TC charging switch via a first capacitive coupling network;

b) coupling the TC to the source voltage during charge periods via the TC charging switch under control of the first charge pump clock output;

c) coupling a second charge pump clock output to a control node of a TC discharging switch via a second capacitive coupling network; and

d) coupling the TC to the output supply via the discharging switch device during discharge periods nonconcurrently alternating with the charge periods under control of the second charge pump clock output.

61. The method of claim 60, wherein the second charge pump clock output is the first charge pump clock output.

62. The method of claim 61, further comprising biasing each capacitive coupling network such that the switch device to which it is coupled is nonconductive when the charge pump clock output is at an average voltage.

63. The method of claim 62, further comprising coupling the TC to the source voltage during the charge periods via an additional second TC charging switch having a control node capacitively coupled to a corresponding charge pump output.

64. The method of claim 63, wherein the TC discharging switch is a first TC discharging switch and is coupled between a first node of the TC and a connection of the output supply opposite a common reference, the method further comprising coupling an opposite second node of the TC to a common reference of the output supply during the discharge periods via a second TC discharging switch having a control node AC impedance no more than half as large as a control node AC impedance of the first TC discharging switch.

65. The method of claim 62, further comprising coupling the TC to the output supply during the discharge periods via an additional second TC discharging switch having a control node capacitively coupled to a corresponding charge pump output.

66. The method of claim 60, further comprising capacitively coupling a corresponding charge pump clock output to a control node of each actively controllable TC coupling switch that is incorporated within a charge pump.

67. The method of claim 66, wherein all charge pump clock outputs are a common single-phase output.