Method for efficiently controlling read/write of flash memory

• US 20050055532A1
• Filed: 09/03/2004
• Published: 03/10/2005
• Est. Priority Date: 09/05/2003
• Status: Abandoned Application

• Current Assignee: Megawin Technology Co., Ltd.
• Original Assignee: Megawin Technology Co., Ltd.
• Inventors: Yu, James
• Application Number:
  US10/933,266
• Publication Number:
  US 20050055532A1
• Time in Patent Office: Days
• US Class Current: 711/203
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 12/0292 using tables or multilevel address translation means G06F12/023 takes precedence; address translation in virtual memory systems G06F12/10
• CPC Class Codes: G06F 2212/7201 Logical to physical mapping or translation of blocks or pages
• CPC Class Codes: G06F 3/061 Improving I/O performance
• CPC Class Codes: G06F 3/064 Management of blocks
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]

Abstract

A method for efficiently controlling read/write of a flash memory is proposed, wherein two address mapping tables and an empty block FIFO mechanism are built. A zone address mapping table matched with its empty block FIFO data is used for the logical address of the file allocation table (FAT). When a host end performs read/write to a flash memory, no matter to which zone the zone address mapping table corresponds, it is not necessary to rebuild the FAT address mapping table. Moreover, a cache address mapping table and its empty block FIFO data can be added. When the logical address is not in the zone address mapping table and the FAT address mapping table, a smaller cache address mapping table is first built to increase the system speed, let control of the flash memory be more efficient, and distribute the utility rate of each block.

Claims

1. A method for efficiently controlling read/write of a flash memory comprising the steps of:

setting a plurality of blocks in said flash memory as a zone, building three logical/physical address mapping tables based on the relationship between block addresses and corresponding logical addresses when the system is booted, said three address mapping tables being a FAT address mapping table, a zone address mapping table of Zone 0, and a cache address mapping table of part blocks of Zone 1; and

directly finding the physical address from said FAT address mapping table when the host end sends out a logical address to be looked up if the logical address is in the FAT of said flash memory, calculating to which block of which zone said logical address to be looked up belongs otherwise, finding the physical address from said zone address mapping table of Zone 0 when the calculation result shows said logical address to be looked up is in Zone 0, searching said cache address mapping table if said logical address to be looked up is not in Zone 0, rebuilding another cache address mapping table according to the calculation result when said cache address mapping table has not said logical address to be looked up, determining whether a zone address mapping table of another zone is to be rebuilt according to the search result until the physical address corresponding to said logical address to be looked up is found for readout or write-in of data.

2. The method as claimed in claim 1, wherein three sets of corresponding empty block FIFO data can be simultaneously built when building said three address mapping tables, if the physical address corresponding to said logical address to be looked up is found in one of said three address mapping tables, a new empty block is first found from the FIFO data of said address mapping table, new data are written into said empty block, original data of the physical address are copied to said empty block, the data in the physical address are then erased, the correspondence relation between said logical and physical addresses of the new block is finally built into said address mapping table, and said empty block whose data therein are erased above is added into the FIFO data.

3. The method as claimed in claim 2, wherein the FIFO principle is based on for selecting the earliest existent empty block in the step of selecting a new empty block from said FIFO data.

4. The method as claimed in claim 1, wherein only a cache address mapping table is built for each said zone.

5. The method as claimed in claim 1, wherein a divider is used for calculation in the step of calculating to which block of which zone said logical address to be looked up belongs.

6. The method as claimed in claim 5, wherein a first fixed number is determined according to the number of blocks of said zone, said logical address to be looked up is divided by said first fixed number, the obtained quotient represents a zone in said memory corresponding to said logical address to be looked up, and the obtained remainder represents a shift of said zone address mapping table corresponding to said logical address to be looked up.

7. The method as claimed in claim 6, wherein a second fixed number is further determined according to the number of blocks of said cache, the calculated remainder is then divided by said second fixed number to obtain a shift of said address mapping table corresponding to said logical address to be looked up.

8. The method as claimed in claim 1, wherein new data are restricted in the same zone when writing data into said flash memory or renewing data in said flash memory.

9. The method as claimed in claim 1, wherein said zone address mapping table, said cache address mapping table and theirs empty block FIFO data are stored in a built-in random access memory of a SD controller.

10. The method as claimed in claim 1, wherein said FAT address mapping table and its empty block FIFO data are stored in a built-in random access memory of a CPU.

11. A method for efficiently controlling read/write of a flash memory comprising the steps of:

setting a plurality of blocks in said flash memory as a zone, building two logical/physical address mapping tables based on the relationship between block addresses and corresponding logical addresses when the system is booted, said three address mapping tables being a FAT address mapping table and a zone address mapping table of Zone 0;

when the host end sends out a logical address to be looked up, directly finding the physical address from said FAT address mapping table if said logical address is in the FAT of said flash memory, calculating to which zone said logical address to be looked up belongs otherwise; and

finding the physical address from said zone address mapping table of Zone 0 when the calculation result shows said logical address to be looked up is in Zone 0, rebuilding a zone address mapping table of another zone according to the calculation result when the calculation result shows said logical address to be looked up is not in Zone 0 until the physical address corresponding to said logical address to be looked up is found for readout or write-in of data.

12. The method as claimed in claim 11, wherein two sets of corresponding empty block FIFO data can be simultaneously built when building said two address mapping tables, if the physical address corresponding to said logical address to be looked up is found in one of said two address mapping tables, a new empty block is first found from the FIFO data of said address mapping table, new data are written into said empty block, original data of the physical address are copied to said empty block, the data in the physical address are then erased, the correspondence relation between said logical and physical addresses of the new block is finally built into said address mapping table, and said empty block whose data therein are erased above is added into the FIFO data.

13. The method as claimed in claim 12, wherein the FIFO principle is based on for selecting the earliest existent empty block in the step of selecting a new empty block from said FIFO data.

14. The method as claimed in claim 11, wherein a divider is used for calculation in the step of calculating to which block of which zone said logical address to be looked up belongs.

15. The method as claimed in claim 11, wherein new data are restricted in the same zone when writing data into said flash memory or renewing data in said flash memory.

16. The method as claimed in claim 11, wherein said zone address mapping table, said cache address mapping table and theirs empty block FIFO data are stored in a built-in random access memory of a SD controller.

17. The method as claimed in claim 11, wherein said FAT address mapping table and its empty block FIFO data are stored in a built-in random access memory of a CPU.