IC chip for identification, data-reading method, and data-writing method

• US 20050056703A1
• Filed: 09/08/2004
• Published: 03/17/2005
• Est. Priority Date: 09/11/2003
• Status: Active Grant

• Current Assignee: Fec Co., Ltd., Government of Malaysia Prime Minister's Department
• Original Assignee: Fec Co., Ltd., Government of Malaysia Prime Minister's Department
• Inventors: Taniguchi, Shuhei, Kobayashi, Hideki, Sugimura, Shiro
• Granted Patent: US 7,511,605 B2
• Time in Patent Office: Days
• US Class Current: 235/492
• CPC Class Codes: G06K 19/0701 at least one of the integrated circuit chips comprising an arrangement for power management
• CPC Class Codes: G06K 19/0723 the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
• CPC Class Codes: G06K 19/0728 the arrangement being an optical or sound-based communication interface

Abstract

Restrictions on the frequency of a carrier signal are removed. This invention comprises a power section for receiving the carrier signal and creating an internal voltage, a clock-generating section for creating an internal clock based on a clock pulse that is carried by the carrier signal, a memory section, a writing section for storing data that is carried on an optical signal in the memory section, and an output section for reading the data in the memory and load-modulating the carrier signal.

Claims

1. An IC chip for identification comprising:

a power section that creates an internal voltage by using a carrier wave from the outside;

a clock-generating section that creates an internal clock based on a clock pulse, which is carried on the carrier wave;

a memory section; and

an output section that serially reads data in the memory section in compliance with the internal clock, and load-modulates the carrier wave.

2. The IC chip for identification as described in claim 1, further comprising a writing section that serially reads data carried by an optical signal from the outside in compliance with an internal clock, and stores it in the memory section.

3. The IC chip for identification as described in claim 2, wherein the writing section detects data overflow and blocks writing to the memory section accordingly.

4. The IC chip for identification as described in claim 3, wherein the clock-generating section distinguishes the clock pulse that is carried by the carrier wave.

5. The IC chip for identification as described in any one of claims 1 to 4, further comprising a bump for connecting an outside antenna, the bump being fitted to an on-chip antenna that connects to the output section.

6. A method for reading data in an IC chip for identification, comprising the steps of

creating an internal clock based on a clock pulse, which is carried on a carrier wave from the outside;

and

serially reading data stored in a memory section in compliance with the internal clock, and load-modulating the carrier wave.

7. A method for writing data in an IC chip for identification, comprising the steps of

creating an internal clock based on a clock pulse, which is carried on a carrier wave from the outside;

serially storing data, which is carried on an optical signal from the outside; and

writing the stored data in a memory section, and in addition, blocking writing to the memory section.