Transparent amorphous carbon structure in semiconductor devices
First Claim
Patent Images
1. A method comprising:
- forming an amorphous carbon layer for a semiconductor structure including introducing a carbon-containing process gas over a wafer to form the amorphous carbon layer having an absorption coefficient between about 0.001 and about 0.15 at a wavelength of 633 nanometers.
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Abstract
A transparent amorphous carbon layer is formed. The transparent amorphous carbon layer has a low absorption coefficient such that the amorphous carbon is transparent in visible light. The transparent amorphous carbon layer may be used in semiconductor devices for different purposes. The transparent amorphous carbon layer may be included in a final structure in semiconductor devices. The transparent amorphous carbon layer may also be used as a mask in an etching process during fabrication of semiconductor devices.
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Citations
84 Claims
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1. A method comprising:
forming an amorphous carbon layer for a semiconductor structure including introducing a carbon-containing process gas over a wafer to form the amorphous carbon layer having an absorption coefficient between about 0.001 and about 0.15 at a wavelength of 633 nanometers. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. A method comprising:
forming a masking structure for the processing of an electronic device, the masking structure having an amorphous carbon layer formed by a method including;
introducing a process gas containing carbon;
flowing a spreading gas; and
subjecting the process gas and the spreading gas to radio frequency energy to spread a plasma over a wafer for a semiconductor structure to form the amorphous carbon layer, wherein the amorphous carbon layer is formed having an absorption coefficient between about 0.001 and about 0.15 at a wavelength of 633 nanometers. - View Dependent Claims (15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26)
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27. A method for forming an electronic device comprising:
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providing a substrate on which one or more circuits are formed; and
forming an amorphous carbon layer for a semiconductor structure during processing of the one or more circuits, forming the amorphous carbon layer including;
introducing a process gas containing carbon; and
providing a spreading gas to spread the process gas over a wafer for the semiconductor structure to form the amorphous carbon layer, wherein the amorphous carbon layer is formed having an absorption coefficient between about 0.001 and about 0.15 at a wavelength of 633 nanometers. - View Dependent Claims (28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41)
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42. A method for forming a memory comprising:
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providing a substrate;
processing a semiconductor structure for the memory on the substrate; and
forming an amorphous carbon layer for the semiconductor structure, forming the amorphous carbon layer including;
introducing a process gas containing carbon over a wafer for the semiconductor structure; and
maintaining a temperature ranging from about 150°
C. to about 500°
C. to form the amorphous carbon layer having an absorption coefficient between about 0.001 and about 0.15 at a wavelength of 633 nanometers. - View Dependent Claims (43, 44, 45, 46, 47, 48, 49, 50)
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51. A method of forming an electronic system comprising:
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providing a controller;
coupling the controller to one or more electronic devices, at least one of the controller and one electronic device of the one or more electronic devices formed by a method that includes forming an amorphous carbon layer for a semiconductor structure, wherein forming the amorphous carbon layer includes;
introducing a process gas containing carbon; and
providing a spreading gas to spread the process gas over a wafer for the semiconductor structure to form the amorphous carbon layer, wherein the amorphous carbon layer is formed having an absorption coefficient between about 0.001 and about 0.15 at a wavelength of 633 nanometers. - View Dependent Claims (52, 53, 54, 55, 56, 57, 58, 59, 60, 61)
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62. An electronic device comprising:
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a semiconductor structure on a substrate; and
an amorphous carbon layer disposed in the semiconductor structure, the amorphous carbon layer having an absorption coefficient between about 0.001 and about 0.15 at a wavelength of 633 nanometers. - View Dependent Claims (63, 64, 65)
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66. An electronic device comprising:
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a semiconductor structure on a substrate; and
an amorphous carbon layer disposed in the semiconductor structure, the amorphous carbon layer formed by a method including;
introducing a process gas containing carbon; and
providing a spreading gas to spread the process gas over a wafer for the semiconductor structure to form the amorphous carbon layer having an absorption coefficient between about 0.001 and about 0.15 at a wavelength of 633 nanometers. - View Dependent Claims (67, 68, 69, 70, 71, 72, 73, 74, 75)
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76. A memory comprising:
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an array of memory cells;
row access circuitry to access a row of the array of memory cells;
column access circuitry to access a column of the array of memory cells;
an input/output circuit to provide transfer of data to and from the array of memory cells; and
control circuitry to control internal and external access to the memory cells, wherein one or more of the memory cells, row access circuitry, column access circuitry, input/output circuit, and control circuit has an semiconductor structure including an amorphous carbon layer having an absorption coefficient between about 0.001 and about 0.15 at a wavelength of 633 nanometers. - View Dependent Claims (77, 78, 79, 80)
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81. An electronic system comprising:
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a controller; and
an electronic device coupled to the controller, wherein at least one of the controller and the electronic device has a semiconductor structure that includes an amorphous carbon layer having an absorption coefficient between about 0.001 and about 0.15 at a wavelength of 633 nanometers. - View Dependent Claims (82, 83, 84)
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Specification