Active matrix substrate and display device comprising same

• US 20050056847A1
• Filed: 09/08/2004
• Published: 03/17/2005
• Est. Priority Date: 09/09/2003
• Status: Active Grant

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Nakamura, Kenji, Okada, Yoshihiro
• Granted Patent: US 8,077,266 B2
• Time in Patent Office: Days
• US Class Current: 257/72
• CPC Class Codes: G02F 1/1368 in which the switching element is a three-electrode device G02F1/136277 takes precedence
• CPC Class Codes: H01L 27/016 Thin-film circuits
• CPC Class Codes: H01L 27/12 the substrate being other than a semiconductor body, e.g. an insulating body
• CPC Class Codes: H01L 29/41733 for thin film transistors with insulated gate
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621
• CPC Class Codes: H10K 59/12 Active-matrix OLED [AMOLED] displays

Abstract

An active matrix includes (i) a thin film transistor including a semiconductor layer formed above a gate electrode, a source electrode, and a drain electrode, the source electrode and the drain electrode formed to overlap with the semiconductor layer; and (ii) a pixel electrode connected to the drain electrode, a pixel electrode connected to the drain electrode, the drain electrode extended from the pixel electrode into a drain electrode formation region located to be kept within a semiconductor layer formation region, the drain electrode formation region sandwiched between two portions of the source electrode. With this arrangement, even when the semiconductor layers in the TFTs (thin film transistors) have unevenness in sizes, shapes, and/or formation positions thereof, it is possible to prevent occurrence of unevenness (changes) in gate-drain capacitances cgd among the TFTs. Thereby, it is possible to provide an active matrix substrate having a high display characteristic.

Claims

1. An active matrix substrate, comprising:

a scanning line on a substrate, the scanning line including a gate electrode;

a thin film transistor including (a) a semiconductor layer formed above the gate electrode, (b) a source electrode, and (c) a drain electrode, the source electrode and the drain electrode formed to overlap with the semiconductor layer;

a signal line that is connected to the source electrode, and that crosses with the scanning line; and

a pixel electrode connected to the drain electrode,

the drain electrode extended from the pixel electrode into a region located within a semiconductor layer formation region, the drain electrode formation region of the semiconductor layer, the drain electrode interleaved in a portion of the source electrode.

2. The active matrix substrate as set forth in claim 1, wherein:

the gate electrode extends from the scanning line to the semiconductor layer formation region, and has an initial end portion and a final end portion, which do not overlap with the semiconductor layer.

3. The active matrix substrate as set forth in claim 1, wherein:

the drain electrode is interleaved between a plurality of portions of the source electrode, the plurality of portions having a strip-like shape; and

the drain electrode has a strip-like shape.

4. The active matrix substrate as set forth in claim 1, wherein:

the source electrode has a portion having a substantially C-shape, and the C-shape portion substantially surrounds the drain electrode.

5. The active matrix substrate as set forth in claim 4, wherein:

the drain electrode has an end portion having a substantially circular shape.

6. The active matrix substrate as set forth in claim 1, wherein:

the semiconductor layer has a substantially circular shape.

8. The active matrix substrate as set forth in claim 1, wherein:

the source electrode has a portion having a substantially semi-elliptical shape, and the semi-elliptical shape portion substantially encircles the drain electrode.

9. The active matrix substrate as set forth in claim 8, wherein:

the drain electrode has an end portion having a substantially elliptical shape.

7. A display device, comprising:

an active matrix substrate including;

a scanning line on a substrate, the scanning line including a gate electrode;

a thin film transistor including (a) a semiconductor layer formed above the gate electrode, (b) a source electrode, and (c) a drain electrode, the source electrode and the drain electrode formed to overlap the semiconductor layer;

a signal line that is connected to the source electrode, and that crosses with the scanning line; and

a pixel electrode connected to the drain electrode,

the drain electrode extended from the pixel electrode into a region located within a semiconductor layer formation region, the drain electrode interleaved in a portion of the source electrode.

10. An active matrix substrate, comprising:

a scanning line on a substrate, the scanning line including a gate electrode;

a thin film transistor including (a) a semiconductor layer formed above the gate electrode, (b) a source electrode, and (c) a drain electrode, the source electrode and the drain electrode formed to overlap with the semiconductor layer;

a signal line that is connected to the source electrode, and that crosses with the scanning line; and

a pixel electrode connected to the drain electrode,

the drain electrode extended from the pixel electrode into a region located within the semiconductor layer, the drain electrode surrounded by a portion of the source electrode.

11. The active matrix substrate as set forth in claim 10, wherein:

the gate electrode extends from the scanning line to within the semiconductor layer, and has an initial end portion and a final end portion, which do not overlap with the semiconductor layer.

12. The active matrix substrate as set forth in claim 10, wherein:

the drain electrode is sandwiched between a plurality of portions of the source electrode, the plurality of the portions having a stripe-like shape; and

the drain electrode has a stripe-shape.

13. The active matrix substrate as set forth in claim 10, wherein:

the source electrode has a portion having a substantially C-shape, and the C-shape portion substantially surrounds the drain electrode.

14. The active matrix substrate as set forth in claim 13, wherein:

the drain electrode has an end portion having a substantially circular shape.

15. The active matrix substrate as set forth in claim 10, wherein:

the semiconductor layer has a substantially circular shape.

16. A display device, comprising:

an active matrix substrate including;

a scanning line on a substrate, the scanning line including a gate electrode;

a thin film transistor including (a) a semiconductor layer formed above the gate electrode, (b) a source electrode, and (c) a drain electrode, the source electrode and the drain electrode formed to overlap the semiconductor layer;

a signal line that is connected to the source electrode, and that crosses with the scanning line; and

a pixel electrode connected to the drain electrode,

the drain electrode extended from the pixel electrode into a region located within the semiconductor layer, the drain electrode surrounded by a portion of the source electrode.