Providing Optimal Supply Voltage to Integrated Circuits

• US 20050057230A1
• Filed: 08/09/2004
• Published: 03/17/2005
• Est. Priority Date: 08/28/2003
• Status: Active Grant

• Current Assignee: Texas Instruments, Inc.
• Original Assignee: Texas Instruments, Inc.
• Inventors: PUTHUCODE, Suresh R., SAHA, Anindya, PAWAR, Vivek Gorakhnath, PRASAD, Sudheer, SHARMA, Anmol
• Granted Patent: US 7,423,475 B2
• Time in Patent Office: Days
• US Class Current: 323/234
• CPC Class Codes: G06F 1/26 Power supply means, e.g. regulation thereof for memories G11C
• CPC Class Codes: G11C 5/06 Arrangements for interconnecting storage elements electrically, e.g. by wiring

Abstract

A characteristic is measured on multiple portions of an integrated circuit, and the supply voltage adjusted based on the measurements. In an embodiment, the characteristic corresponds to propagation delay which indicates whether the integrated circuit is implemented with a strong, weak or nominal process corner. In general, the supply voltage can be increased in the case of a weak process corner and decreased in the case of a strong process corner.

Claims

1. A method of providing optimal supply voltage to an integrated circuit, said method comprising:

providing a supply voltage to said integrated circuit;

measuring a characteristic at a plurality of portions on said integrated circuit to generate corresponding measured values; and

adjusting said supply voltage to an optimum value based on said measured values.

2. The method of claim 1, wherein said characteristic comprises a propagation delay of signals in each of said plurality of portions.

3. The method of claim 2, wherein a high measured value of said propagation delay indicates a weak process corner on said integrated circuit, and a low measured value indicates a strong process corner on said integrated circuit.

4. The method of claim 3, wherein said adjusting comprises increasing said supply voltage if said propagation delay has said high measured value and decreasing said supply voltage if said propagation delay has said low measured value.

5. The method of claim 4, further comprises receiving said measured values on a multiplexer and processing each of said measured values using a shared circuit.

6. The method of claim 5, wherein said adjusting comprises:

selecting a maximum value and a minimum value from said measured values; and

determining whether to increase or decrease said supply voltage based on said maximum value.

7. The method of claim 6, wherein said adjusting further comprising:

checking whether a ratio of said maximum value and said minimum value exceeds a pre-specified threshold; and

using a next highest value instead of said maximum value in said determining.

8. The method of claim 6, further comprising:

determining a first value, a second value and a third value corresponding to a weak process corner, a nominal process corner and a strong process corner respectively for a present supply voltage; and

discarding said integrated circuit as being unusable if said maximum value is more than a first multiplier of said first value or if said maximum value is less than a second multiplier of said third value.

9. The method of claim 6, wherein said determining determines to increase said supply voltage if said maximum value is less than a first multiplier of said first value and if said maximum value is more than a second multiplier of said third value.

10. The method of claim 6, wherein said determining determines to decrease said supply voltage if said maximum value is less than a first multiplier of said third value and if said maximum value is more than a second multiplier of said third value.

11. The method of claim 1, further comprises programming a register with an adjustment value, wherein said adjustment value represents said optimum value of said supply voltage, wherein said adjusting uses said adjustment value to adjust said supply voltage while initializing said integrated circuit.

12. A device comprising:

an application block implementing a user application;

a power management block providing a supply voltage to said application block;

a measurement block measuring a characteristic at a plurality of portions on said application block to generate corresponding measured values; and

a processing unit interfacing with said power management block to adjust said supply voltage to an optimum value based on said measured values.

13. The device of claim 12, wherein said application block, said measurement block, said power management block and said processing unit are fabricated on a single die.

14. The device of claim 13, wherein said characteristic comprises a propagation delay of a corresponding signal in said plurality of portions.

15. The device of claim 14, wherein said measurement block comprises a monitor block generating said measured values representing said propagation delay at said plurality of portions, wherein said processing unit determines a strength of process corner of said application block based on said measured values, and said power management block adjusts said supply voltage to an optimum value based on said strength.

16. The device of claim 15, wherein said measurement block further comprises a plurality of gated ring oscillators (GROs), wherein each of said plurality of GROs is located at a corresponding one of said plurality of portions, said plurality of GROs generating a corresponding number of signals.

17. The device of claim 16, wherein said monitor block comprises a multiplexer to select one of said signals.

18. The device of claim 17, said monitor block further comprising:

a transition detector generating pulses representing transitions in an output generated by said multiplexor;

a counter receiving a clock signal and counting a number of clock periods of said clock signal between two successive transitions generated by said transition detector to generate a measured value corresponding to said output, wherein said measured value is comprised in said plurality of measured values; and

a capture register storing said measured value.

19. The device of claim 17, said monitor block comprising:

a counter generating a measured value by counting number of cycles in an output generated by said multiplexer during a fixed time period, wherein said measured value is comprised in said plurality of measured values.

20. The device of claim 17, wherein a high value of said measured values indicates a weak process corner at a corresponding portion, and a low value of said measured values indicates a strong process corner at a corresponding portion.

21. The device of claim 20, wherein said processing unit is operable to:

select a maximum value and a minimum value from said measured values; and

determine whether to increase or decrease said supply voltage based on said maximum value, wherein said power management block increases said supply voltage if said maximum value has said high value and decreases said supply voltage if said maximum value has said low value.

22. The device of claim 21, wherein said processing unit is further operable to:

check whether a ratio of said maximum value and said minimum value exceeds a pre-specified threshold; and

use a next highest value instead of said maximum value to perform said determine if said ratio exceeds said pre-specified threshold.

23. The device of claim 21, wherein said processing unit is further operable to:

receive a first value, a second value and a third value corresponding to a weak process corner, a nominal process corner and a strong process corner respectively for a present supply voltage; and

discard said single die as being unusable if said maximum value is more than a first multiplier of said first value or if said maximum value is less than a second multiplier of said third value.

24. The device of claim 21, wherein said processing unit determines to increase said supply voltage if said maximum value is less than a first multiplier of said first value and if said maximum value is more than a second multiplier of said third value.

25. The device of claim 21, wherein said processing unit determines to decrease said supply voltage if said maximum value is less than a first multiplier of said third value and if said maximum value is more than a second multiplier of said third value.

26. The device of claim 25, further comprises a random access memory (RAM) storing a lookup table containing measured values corresponding to a weak process corner, a nominal process corner and a strong process corner for a plurality of pre-determined levels of said supply voltage and said RAM provides said first value, said second value and said third value.

27. The device of claim 26, wherein said maximum value comprises the largest value among said plurality of measured values and said minimum value comprises the smallest value among said plurality of measured values.

28. The device of claim 15, wherein said power management block comprises:

a register programmed to store an adjustment value, wherein said adjustment value causes said power management block to provide said optimum value of said supply voltage while initializing said single die.

29. The device of claim 28, wherein said power management block further comprises:

a capacitor charging to said optimum value of said supply voltage;

a second multiplexer selecting one of said adjustment value or an output value of said processing unit as a multiplexer output; and

a controller generating pulses based on said multiplexer output, a reference voltage and present value of said supply voltage, wherein said controller further generates a first signal if said output of said second multiplexer changes or while said capacitor is charging to said optimal value, said controller sending a second signal after said capacitor is charged to said optimum value.

30. The device of claim 29, wherein said power management block further comprises:

a current limiter receiving said first signal and said second signal, and generating a third signal indicating a normal mode or a constant current mode; and

a power stage receiving said third signal and said pulses, and generating high power pulses in said normal mode, and providing current to said capacitor in said constant current mode.