Signal isolators using micro-transformer

• US 20050057277A1
• Filed: 04/29/2004
• Published: 03/17/2005
• Est. Priority Date: 04/30/2003
• Status: Active Grant

• Current Assignee: Analog Devices, Inc.
• Original Assignee: Analog Devices, Inc.
• Inventors: Haigh, Geoffrey, Chen, Baoxing
• Granted Patent: US 7,075,329 B2
• Time in Patent Office: Days
• US Class Current: 326/82
• CPC Class Codes: H01F 17/0006 Printed inductances printed coils for dynamo-electric machines H02K3/26; printed circuits H05K
• CPC Class Codes: H01F 19/08 Transformers having magnetic bias, e.g. for handling pulses
• CPC Class Codes: H01F 2017/0093 Common mode choke coil
• CPC Class Codes: H01F 2019/085 Transformer for galvanic isolation
• CPC Class Codes: H01F 2038/143 for signals
• CPC Class Codes: H01L 2224/05554 being square
• CPC Class Codes: H01L 2224/45099 Material
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48137 the bodies being arranged next to each other, e.g. on a common substrate
• CPC Class Codes: H01L 23/5227 Inductive arrangements or effects of, or between, wiring layers other inductive arrangements H01L23/645
• CPC Class Codes: H01L 23/60 Protection against electrostatic charges or discharges, e.g. Faraday shields
• CPC Class Codes: H01L 23/645 Inductive arrangements H01L23/647, H01L23/66 take precedence
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/13091 Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
• CPC Class Codes: H03K 5/1252 Suppression or limitation of noise or interference specially adapted for transmission systems H04B15/00, H04L25/08
• CPC Class Codes: H04L 25/0266 Arrangements for providing Galvanic isolation, e.g. by means of magnetic or capacitive coupling

Abstract

A logic signal isolator comprising a transformer having a primary winding and a secondary winding; a transmitter circuit which drives said primary winding in response to a received logic signal, such that in response to a first type of edge in the logic signal, a signal of a first predetermined type is supplied to the primary winding and in response to a second type of edge in the logic signal, a signal of a second predetermined type is supplied to said primary winding, the primary winding and the transmitter being referenced to a first ground; and the secondary winding being referenced to a second ground which is galvanically isolated from the first ground and said secondary winding supplying to a receiver circuit signals received in correspondence to the signals provided to the primary winding, the receiver reconstructing the received logic signal from the received signals.

Claims

1. A logic signal isolator comprising:

a transformer having a primary winding and a secondary winding;

a transmitter circuit which drives said primary winding in response to a received logic signal, such that in response to a first type of edge in the logic signal, a signal of a first predetermined type is supplied to the primary winding and in response to a second type of edge in the logic signal, a signal of a second predetermined type is supplied to said primary winding, the primary winding and the transmitter being referenced to a first ground; and

the secondary winding being referenced to a second ground which is galvanically isolated from the first ground and said secondary winding supplying to a receiver circuit signals received in correspondence to the signals provided to the primary winding, the receiver reconstructing the received logic signal from the received signals.

2. The isolator of claim 1, wherein the receiver includes circuitry for distinguishing between the received signals corresponding to the transmitted signals of the first type and second type and using the distinguished received signals to reconstitute the received logic signal.

3. The isolator of claim 1 or claim 2, wherein the signals of the first type comprise multiple pulses in a predetermined pattern and the signals of the second type comprise one or more pulses in a different pattern.

4. The isolator of claim 1 or claim 2, wherein the signals of the first type comprise pulses of a first duration and the signals of the second type comprise pulses of a second, distinguishable duration.

5. The isolator of claim 1 or claim 2, wherein at least one of the signals of the first or the second type comprise at least one burst.

6. The isolator of claim 1 or claim 2, wherein the transmitter circuit is on a first substrate and the receiver is on a second substrate electrically isolated from the first substrate.

7. The isolator of claim 6, wherein the primary winding and the secondary winding are substantially planar windings arrange in a stacked arrangement with at least one of the windings substantially in or on one of the substrates.

8. The isolator of claim 7, wherein the primary winding is a bottom winding and the secondary winding is a top winding.

9. The isolator of claim 8 further including a compensation network connected to the top winding.

10. The isolator of claim 7 wherein the primary winding is a top winding and the secondary winding is a bottom winding.

11. A digital logic isolator, comprising:

a. a transformer having a primary winding referenced to a first ground and a secondary winding referenced to a second ground isolated from the first ground;

b. means for providing to the primary winding signals of a first type in response to transitions of a first type in an input logic signal;

c. means for providing to the primary winding signals of a second type different from the signals of the first type in response to transitions of a second type in the input logic signal; and

d. means for receiving from the secondary winding signals corresponding to the signals of the first and second types and for reconstituting the input logic signal from them.

12. A method of providing an isolated logic signal output in response to a logic signal input, comprising:

a. providing a transformer having a primary winding referenced to a first ground and a secondary winding referenced to a second ground isolated from the first ground;

b. providing to the primary winding signals of a first type in response to transitions of a first type in the input logic signal;

c. providing to the primary winding signals of a second type different from the signals of the first type in response to transitions of a second type in the input logic signal; and

d. receiving from the secondary winding signals corresponding to the signals of the first and second types and reconstituting the input logic signal from them.

13. The method of claim 12 wherein the signals of a first type comprise multiple pulses, the signals of the second type comprise a single pulse and reconstituting the input logic signal comprises distinguishing between the signals corresponding to said multiple pulses and the signals corresponding to said single pulses so as to provide an output signal reconstituting the transitions in the input logic signal.

14. The method of claim 12 wherein the signals of a first type or the signals of a second type comprise a burst.

15. The method of claim 14 wherein both signals of a first type and the signals of a second type comprise bursts distinguishable from each other by frequency, duration or other characteristic.

16. The method of claim 12 wherein a signal of the first type comprises a pulse of a first duration and a signal of the second type comprises a pulse of a second duration different from the first duration and distinguishable therefrom and reconstituting the input logic signal comprises distinguishing between received signals corresponding to the pulses of a first duration and the pulses of a second duration so as to provide an output signal reconstituting the transitions in the input logic signal.

17. A logic isolator comprising:

a. a micro-transformer comprising, on a substrate, vertically stacked, a bottom winding and a top winding disposed over and insulated from the bottom winding;

b. a damping network connected across the top winding;

c. a transmitter circuit receiving a logic input signal and driving a signal to said bottom winding; and

d. a receiving circuit connected to receive from the top winding a signal corresponding to the signal driving the bottom winding and generating an output comprising a reconstituted logic input signal.

18. A logic isolator comprising:

a. a micro-transformer comprising, on a substrate, vertically stacked, a bottom winding and a top winding disposed over and insulated from the bottom winding;

b. a damping network connected across the top winding;

c. a transmitter circuit receiving a logic input signal and providing a transformer driving signal;

d. a receiving circuit connected to receive from the transformer a signal corresponding to the driving signal and generating an output comprising a reconstituted logic input signal; and

e. means for programming the isolator by coupling the driving signal to a selected one of the windings and coupling the receiving circuit to the other one of the windings.

19. The isolator of claim 18 wherein the means for programming comprises a fusible connection programmed by blowing open a conductive path.

20. The isolator of claim 18 wherein the means for programming comprises bond wires provided between the transformer windings on the one hand and the transmitter and receiving circuits, on the other hand.

21. The isolator of claim 18 wherein the means for programming comprises programmable circuitry configurable to connect the transmitter circuit to either the top winding or the bottom winding and to connect the receiving circuit to the other winding.

22. The isolator of claim 21 wherein the programmable circuitry includes programmable switching circuits and a memory containing programming to control the switching circuits.

23. The isolator of claim 22 wherein the memory is read-only memory.

35. The isolator of claim 21 wherein the programmable circuitry includes programmable switching circuits and a memory containing programming to control the switching circuits.

36. The isolator of claim 22 wherein the memory is read-only memory.

24. A dual-channel, bi-directional isolator comprising:

a. first and second micro-transformers arranged on a first substrate, each transformer having a top winding and a bottom winding;

b. a first transmitter circuit connected to drive the bottom winding of the first transformer;

c. a second transmitter circuit connected to drive the top winding of the second transformer;

d. a first receiver circuit connected to receive signals from the bottom winding of the second transformer;

e. a second receiver circuit connected to receive signals from the top winding of the first transformer.

25. The isolator of claim 24 wherein the first transmitter circuit and first receiver circuit are on the first substrate, and the second transmitter circuit and second receiver circuit are on a second substrate which is electrically isolated from the first substrate.

26. A single channel bi-directional isolator comprising:

a. a micro-transformer arranged on a first substrate, the transformer having a top winding and a bottom winding;

b. a first transmitter circuit connected to drive the bottom winding;

c. a second transmitter circuit and connected to drive the top winding;

d. a first receiver circuit connected to receive signals from the top winding;

e. a second receiver circuit connected to receive signals from the bottom winding; and

f. the first and second transmitter circuits transmitting so as to avoid interfering with each other.

27. The isolator of claim 26 wherein the first transmitter circuit and the second receiver circuit are on the first substrate and the second transmitter circuit and the first receiver circuit are on a second substrate which is electrically isolated from the first substrate.

28. A delay element for use in a pulse generator to supply a supply-voltage-independent delay interval, comprising first and second current sources which supply currents I1 and I2, respectively, and a switching element;

the sum of currents I1 and I2 being directly proportional to the supply voltage, and a threshold of the switching element being a predetermined portion of the supply voltage.

29. The delay element of claim 28 wherein said first current source comprises a single transistor and a resistor, the resistor, of resistance value R, having one end connected to the supply voltage and the other end connected to said transistor.

30. The delay element of claim 29 further including a capacitor of capacitance C connected to an input of the switching element and charged by the current sources such that I1=(VDD−

VT)/R, where the transistor is a MOS transistor, VT is the threshold voltage of the MOS transistor, VDD is the supply voltage, I2=VT/R, I1+I2=VDD/R and the delay interval is approximately 0.5RC if the switching threshold if the switching element is set to be VDD/2.

31. A logic isolator comprising:

a. a micro-transformer comprising, on a substrate, vertically stacked, a bottom winding and a top winding disposed over and insulated from the bottom winding;

b. a damping network connected across the top winding;

c. a first module coupled to the top winding capable of either receiving a logic input signal and providing a transformer driving signal or receiving from the transformer a signal corresponding to the driving signal and generating an output comprising a reconstituted logic input signal;

d. a second module coupled to the bottom winding capable of either receiving a logic input signal and providing a transformer driving signal or receiving from the transformer a signal corresponding to the driving signal and generating an output comprising a reconstituted logic input signal;

e. means for programming the isolator such that the first module operates in the transformer drive mode while the second circuit operates in the receive mode or that the first module operates in the receive mode while the second module operates in the transformer drive mode.

32. The isolator of claim 31 wherein the means for programming comprises at least one fusible connection programmed by blowing open at least one conductive path.

33. The isolator of claim 31 wherein the means for programming comprises one or more bond wires provided between the transformer windings on the one hand and the first and second modules, on the other hand.

34. The isolator of claim 31 wherein the means for programming comprises programmable circuitry configurable to connect the first module to either the top winding or the bottom winding and to connect the second module to the other winding.