Soft errors handling in eeprom devices
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0 Petitions
Accused Products
Abstract
Soft errors occur during normal use of a solid-state memory such as EEPROM or Flash EEPROM. A soft error results from the programmed threshold voltage of a memory cell being drifted from its originally intended level. The error is initially not readily detected during normal read until the cumulative drift becomes so severe that it develops into a hard error. Data could be lost if enough of these hard errors swamps available error correction codes in the memory. A memory device and techniques therefor are capable of detecting these drifts and substantially maintaining the threshold voltage of each memory cell to its intended level throughout the use of the memory device, thereby resisting the development of soft errors into hard errors.
110 Citations
43 Claims
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1-34. -34. (Canceled)
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35. A method of improving data retention in a nonvolatile writable memory having a first reference level and a second reference level, the nonvolatile writable memory having a plurality of memory cells, each of the memory cells being in an first state when storing a charge below the first reference level, and each of the memory cells being in a second state when storing a charge above the second reference level, the method comprising:
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writing into each of a set of the plurality of memory cells a respective data value, wherein the data values are one of the first and second states;
identifying a memory cell of the set having a charge above the first reference level and below the second reference level; and
rewriting the respective data value into the memory cell. - View Dependent Claims (36, 37, 38)
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39. A method of improving data retention in a nonvolatile writable memory having a first reference level and a second reference level, the nonvolatile writable memory having a plurality of memory cells organized into sectors, each of the memory cells being in an first state when storing a charge below the first reference level, and each of the memory cells being in a second state when storing a charge above the second reference level, the method comprising:
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accessing a first sector of said memory cells;
identifying a second sector of said memory cells having one or more memory cells with a charge above the first reference level and below the second reference level; and
rewriting the data values stored in the memory cells of the second sector. - View Dependent Claims (40, 41, 42, 43)
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Specification