Bit allocation among carriers in multicarrier communications

• US 20050058213A1
• Filed: 10/05/2004
• Published: 03/17/2005
• Est. Priority Date: 11/25/1998
• Status: Active Grant

• Current Assignee: Intellectual Ventures II LLC (Intellectual Ventures LLC)
• Original Assignee: Aware Incorporated (Crowley Holdings Preferred LLC)
• Inventors: Tzannes, Marcos C., Sandberg, Stuart D., Shapiro, Jerome M.
• Granted Patent: US 7,801,225 B2
• Time in Patent Office: Days
• US Class Current: 375/260
• CPC Class Codes: H04L 1/004 by using forward error control H04L1/0618 takes precedence; coding, decoding or code conversion, for error detection or correction H03M13/00
• CPC Class Codes: H04L 5/0044 allocation of payload

Abstract

A technique is provided that may be employed in multicarrier communications to improve the efficiency of error correction using symbol-oriented error correction methodologies, by reducing the number of error correction code symbols (102, 104 . . . ) that are received in error that result from a single channel error. More specifically, in this technique, bits from the symbols are allocated among the channels in such a way as to minimize the number of respective channels that are allocated bits belonging to more that one respective symbol during a respective transmission period.

Claims

1. A multicarrier data modulation method comprising the steps of:

providing a plurality of carrier signals for use in modulating a plurality of data bit signals of a serial input data stream, a predetermined number of the plurality of data bit signals being mapped into each one of a plurality of error correction symbols before the plurality of data bit signals are modulated on the carrier signals, wherein a number of data bit signals that can be modulated on at least one carrier signal is fewer than the predetermined number of data bit signals that are mapped to each error correction symbol, and each of said carrier signals are associated with a respective transmission channel; and

allocating the plurality of data bit signals among the carrier signals, wherein the allocating of the data bit signals among the carrier signals minimizes the number of carrier signals that modulate data bit signals belonging to different error correction symbols during a transmission period.

2. A method according to claim 1, wherein each error correction symbol is a forward error correction coding symbol.

3. A method according to claim 1, wherein each error correction symbol has a size of one byte.

4. A method according to claim 1, wherein, during the transmission period, for each carrier signal, all the data bit signals allocated to that carrier signal are mapped to one error correction symbol.

5. A method according to claim 1, wherein the step of allocating the data bit signal among the carrier signals comprises determining maximum numbers of data bit signals that may be transmitted via the channels without exceeding a desired maximum probability of bit transmission error, and allocating the data bit signals to the carrier signals in accordance with a carrier signal allocation sequence order, the order being such that the number of carrier signals that modulate data bit signals belonging to different error correction symbols is minimized.

6. A method according to claim 1, wherein the step of allocating the data bit signals among the carrier signals comprises adjusting a transmission gain of at least one channel so as to change to a different number of data bit signals a maximum number of data bit signals that can be transmitted via the at least one channel without exceeding a desired maximum probability of bit transmission error, and allocating an actual number of data bit signals to the carrier signal associated with the at least one channel in accordance with the different number.

7. A method according to claim 5, wherein the step of allocating the data bit signals among the carrier signals also comprises adjusting a transmission gain of at least one channel so as to change to a different number of data bit signals a maximum number of bit signals that can be transmitted via the at least one channel without exceeding the desired maximum probability of bit transmission error, and allocating an actual number of bit signals to the carrier signal associated with the at least one channel in accordance with the different number.

8. Computer-readable memory comprising stored computer-executable program instructions that when executed:

provide a plurality of carrier signals for use in modulating a plurality of data bit signals of a serial input data stream, a predetermined number of the plurality of data bit signals being mapped into each one of a plurality of error correction symbols before the plurality of data bit signals are modulated on the carrier signals, wherein a number of data bit signals that can be modulated on at least one carrier signal is fewer than the predetermined number of data bit signals that are mapped to each error correction symbol, and each of said carrier signals are associated with a respective transmission channel; and

allocate the plurality of data bit signals among the carrier signals, wherein the allocation of the data bit signals among the carrier signals minimizes the number of carrier signals that modulate data bit signals belonging to different error correction symbols during a transmission period.

9. Memory according to claim 8, wherein each error correction symbol is a forward error correction coding symbol.

10. Memory according to claim 8, wherein each error correction symbol has a size of one byte.

11. Memory according to claim 8, wherein during the transmission period, for each carrier signal, all the data bit signals allocated to that carrier signal are mapped to one error correction symbol.

12. Memory according to claim 8, wherein the allocating of the data bit signals among the carrier signals comprises determining maximum numbers of bit signals that may be transmitted via the channels without exceeding a desired maximum probability of bit transmission error, and allocating the maximum numbers of data bit signals to the carrier signals in accordance with a carrier signal allocation sequence order, the order being such that the number of carrier signals that are allocated data bit signals belonging to more than one error correction symbol during the transmission period is minimized.

13. Memory according to claim 8, wherein the allocating of the data bit signals among the carrier signals comprises adjusting a transmission gain of at least one channel so as to change to a different number of data bit signals a maximum number of data bit signals that can be transmitted via the at least one channel without exceeding a desired maximum probability of bit transmission error, and allocating an actual number of data bit signals to the carrier signal associated with the at least one channel in accordance with the different number.

14. Memory according to claim 12, wherein the allocating of the data bit signals among the carrier signals comprises adjusting a transmission gain of at least one channel so as to change to a different number of data bit signals a maximum number of data bit signals that can be transmitted via the at least one channel without exceeding a desired maximum probability of bit transmission error, and allocating an actual number of data bit signals to the carrier signal associated with the at least one channel in accordance with the different number.

15. A multicarrier data modulation system comprising:

a transceiver that generates a plurality of carrier signals for use in modulating a plurality of data bit signals of a serial input data stream,

a processor that maps a predetermined number of the plurality of data bit signals into each one of a plurality of error correction symbols before the plurality of data bit signals are modulated on the carrier signals, wherein a number of data bit signals that can be modulated on at least one carrier signal is fewer than the predetermined number of data bit signals that are mapped to each error correction symbol, and each of said carrier signals are associated with a respective transmission channel and

allocates the plurality of data bit signals among the carrier signals, wherein the processor allocates the data bit signals among the carrier signals to minimize the number of carrier signals that modulate data bit signals belonging to different error correction symbols during a transmission period.

16. A system according to claim 15, wherein each error correction symbol is a forward error correction coding symbol.

17. A system according to claim 16, wherein each error correction symbol has a size of one byte.

18. A system according to claim 15, wherein during the transmission period, for each carrier signal, all the data bit signals allocated to that carrier signal are mapped to one error correction symbol.

19. A system according to claim 15, wherein the processor determines maximum numbers of data bit signals that may be transmitted via the channels without exceeding a desired maximum probability of bit transmission error, and allocates the maximum number of data bit signals to the carrier signals in accordance with a carrier signal allocation sequence order, the order being such that the number of carrier signals that are allocated data bit signals belonging to different error correction symbols during transmission period is minimized.

20. A system according to claim 15, wherein the processor also adjusts a transmission gain of at least one channel so as to change to a different number of data bit signals a maximum number of data bit signals that can be transmitted via the at least one channel without exceeding a desired maximum probability of bit transmission error, and allocates an actual number of data bit signals to the carrier signals associated with the at least one channel in accordance with the different number.

21. A system according to claim 19, wherein the processor also adjusts a transmission gain of at least one channel so as to change to a different number of data bit signals a maximum number of data bit signals that can be transmitted via the at least one channel without exceeding a desired maximum probability of bit transmission error, and allocates an actual number of data bit signals to the carrier signals associated with the at least one channel in accordance with the different number.

22. A multicarrier data modulation method comprising the steps of:

providing a plurality of carrier signals for use in modulating a plurality of data bit signals of a serial input data stream, a predetermined number of the plurality of data bit signals being mapped into each one of a plurality of error correction symbols before the plurality of data bit signals are modulated on the carrier signals, wherein a number of data bit signals that can be modulated on at least one carrier signal is fewer than the predetermined number of data bit signals that are mapped to each error correction symbol, and each of said carrier signals is associated with a respective transmission channel; and

allocating the plurality of data bit signals among the carrier signals for modulation using the carrier signals, wherein the allocating of the plurality of data bit signals among the carrier signals is adapted to account for the number of carrier signals that modulate data bit signals belonging to different error correction symbols during a transmission period.

23. A method according to claim 22, wherein the allocating of the data bit signals is also based upon an adjustment of a signal-to-noise margin of at least one channel.

24. A method according to claim 23, wherein the adjustment is carried out in such a way as to permit the at least one channel to be assigned data bit signals from only a single error correction symbol during a transmission period.

25. A method according to claim 23, wherein the data bit signals are allocated among the carrier signals in accordance with a carrier signal allocation sequence order, the order being such that the number of carrier signals that modulate data bits signals belonging to different error correction symbols is minimized.

26. Memory according to claim 22, wherein the data bit signals are allocated among the carrier signals in accordance with a carrier signal allocation sequence order, the order being such that the number of carrier signals that modulate data bits signals belonging to different error correction symbols is minimized.

27. A system according to claim 22, wherein the processor allocates the data bit signals to the carrier signals in accordance with a carrier signal allocation sequence order, the order being such that the number of carrier signals that modulate data bit signals belonging to different error correction symbols during the transmission period is minimized.

28. A method according to claim 23, wherein the actual signal-to-noise ratio of the at least one channel is approximately the sum of the margin and a minimum required signal-to-noise ratio for the at least one channel, the data bit signals to be transmitted via the at least one channel belong to more than one error correction symbol during the transmission period, and the adjustment comprises increasing the margin so as to reduce the number of data bit signals that may be transmitted by the at least one channel while decreasing an error rate probability associated with bit signal transmission via the at least one channel.

29. A method for modulating data bit signals over a transmission channel having a plurality of subchannels, the method comprising:

mapping a predetermined number of data bit signals of an input data stream to each of a plurality of error correction symbols;

providing a plurality of subchannels for use in modulating a plurality of data bit signals, at least one of the subchannels being used to modulate fewer than the predetermined number of data bit signals that are mapped to each error correction symbol;

placing the subchannels into groups comprised of one or more subchannels based on a number of data bit signals that the subchannels can modulate, each group of subchannels being capable of modulating the predetermined number of data bits signals that are mapped to each error correction symbol; and

allocating the plurality of data bit signals among the groups of subchannels such that data bit signals that are mapped to different error correction symbols are not modulated on the same subchannel, thereby minimizing the number of error correction symbols that are affected by an error occurring on any given subchannel during a transmission period.

30. The method of claim 29, further comprising determining a subchannel order in which to allocate the data bit signals of the error correction symbols to the subchannels.

31. The method of claim 30, further comprising adjusting the number of data bit signals that can be carried by a given subchannel.

32. The method of claim 31, wherein adjusting the number of data bit signals comprises adjusting the transmission gain for the given subchannel.

33. The method of claim 31, wherein adjusting the number of data bit signals comprises adjusting the signal-to-noise ratio for the given subchannel.

34. The method of claim 30, wherein the order is based upon the bit size of the error correction symbol and the number of data bit signals that each subchannel can carry.

35. The method of claim 29, further comprising adjusting the number of data bit signals that can be carried by a given subchannel.

36. The method of claim 35, wherein adjusting the number of data bit signals comprises adjusting the transmission gain for the given subchannel.

37. The method of claim 35, wherein adjusting the number of data bit signals comprises adjusting the signal-to-noise ratio for the given subchannel.

38. The method of claim 29, wherein the allocating occurs during initialization of a multicarrier transceiver.