Pipeline processing system and information processing apparatus
First Claim
1. A pipeline processing system applying pipeline processing for a plurality of data, comprising:
- a plurality of processing circuits configuring pipeline stages and applying predetermined processings to said plurality of data;
a memory portion including at least one memory able to store data having a magnitude required in at least one pipeline stage and accessed by any processing circuit of said plurality of processing circuits; and
an encrypting circuit for encrypting data based on information set for each series of pipeline processing to be continuously processed when the processing results of said processing circuits are stored in the memories of said memory portion.
1 Assignment
0 Petitions
Accused Products
Abstract
A pipeline processing system and an information processing apparatus not malfunctioning even if there is a pipeline stage in which data is not correctly written, including a plurality of processing circuits for applying predetermined processing to a plurality of data blocks; memories accessed by any circuit of a plurality of processing circuits, encryptor for encrypting the data based on key information set for each series of pipeline processings continuously processed when storing processing results of the circuits in the memories; and decoders for decoding data based on set information used for the encrypting when reading the data encrypted and stored in the memories.
-
Citations
22 Claims
-
1. A pipeline processing system applying pipeline processing for a plurality of data, comprising:
-
a plurality of processing circuits configuring pipeline stages and applying predetermined processings to said plurality of data;
a memory portion including at least one memory able to store data having a magnitude required in at least one pipeline stage and accessed by any processing circuit of said plurality of processing circuits; and
an encrypting circuit for encrypting data based on information set for each series of pipeline processing to be continuously processed when the processing results of said processing circuits are stored in the memories of said memory portion. - View Dependent Claims (2, 3, 4, 5, 6, 7)
-
-
8. An information processing apparatus for reading recorded data from a medium recording data of a predetermined format, comprising:
-
a demodulation circuit for configuring a pipeline stage and demodulating said read data;
an error processing circuit configuring a pipeline stage and performing predetermined error processing with respect to the data after said demodulation;
a memory portion including at least one memory able to store data having a magnitude required in at least one pipeline stage and accessed by any circuit of said demodulation circuit or the error processing circuit; and
an encrypting circuit for encrypting data based on information set for each series of pipeline processing to be continuously processed when the processing results of said demodulation circuit and error processing circuit are stored in the memories of said memory portion. - View Dependent Claims (9, 10, 11, 12)
-
-
13. An information processing apparatus for recording input data as the data of a predetermined format into the media, comprising:
-
a recording data preparation circuit for preparing the data to be recorded based on said each input data;
a modulation circuit configuring a pipeline stage, modulating said prepared recording data, and outputting the same as the recording data to said medium;
a memory portion including at least one memory able to store the data having a magnitude required in at least each pipeline stage and accessed by any circuit of said modulation circuit or recording data preparation circuit; and
an encrypting circuit for encrypting the data based on the information set for each of a series of pipeline processings continuously processed when the processing results of said recording data preparation circuit are stored in the memories of said memory portion. - View Dependent Claims (14, 15, 16, 17)
-
-
18. An information processing apparatus for reading recorded data from a medium recording data of a predetermined format and recording input data as data of a predetermined format into the medium, comprising:
-
a demodulation circuit configuring a pipeline stage and demodulating each read data;
an error processing circuit configuring a pipeline stage and performing predetermined error processing with respect to said data after demodulation;
a recording data preparation circuit configuring a pipeline stage and preparing data to be recorded based on each input data;
a modulation circuit configuring a pipeline stage, modulating said prepared recording data, and outputting the same as the recording data to said medium;
a memory portion including at least one memory able to store data having a magnitude required in at least each pipeline stage and accessed by any circuit of said demodulation circuit, error processing circuit, recording data preparation circuit, and modulation circuit; and
an encrypting circuit for encrypting data based on information set for each series of pipeline processings continuously processed when the processing results of said demodulation circuit, error processing circuit, and recording data preparation circuit are stored in the memories of said memory portion. - View Dependent Claims (19, 20, 21, 22)
-
Specification