Radar detection circuit for a WLAN transceiver

• US 20050059364A1
• Filed: 03/31/2004
• Published: 03/17/2005
• Est. Priority Date: 09/15/2003
• Status: Active Grant

• Current Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Hansen, Christopher J., Trachewsky, Jason A.
• Granted Patent: US 7,593,692 B2
• Time in Patent Office: Days
• US Class Current: 455/127.400
• CPC Class Codes: G01S 7/021 Auxiliary means for detecting or identifying radar signals or the like, e.g. radar jamming signals
• CPC Class Codes: G01S 7/023 Interference mitigation, e.g. reducing or avoiding non-intentional interference with other HF-transmitters, base station transmitters for mobile communication or other radar systems, e.g. using electro-magnetic interference [EMI] reduction techniques auxiliary means for detecting or identifying radar signals or the like G01S7/021; means for anti-jamming G01S7/36
• CPC Class Codes: H04B 1/1027 assessing signal quality or detecting noise/interference for the received signal
• CPC Class Codes: H04K 2203/18 for wireless local area networks or WLAN
• CPC Class Codes: H04K 3/224 with countermeasures at transmission and/or reception of the jammed signal, e.g. stopping operation of transmitter or receiver, nulling or enhancing transmitted power in direction of or at frequency of jammer
• CPC Class Codes: H04K 3/226 Selection of non-jammed channel for communication spectrum sharing arrangements H04W16/14; selection of wireless resources by user or terminal H04W72/02
• CPC Class Codes: H04K 3/822 by detecting the presence of a surveillance, interception or detection
• CPC Class Codes: H04W 16/14 Spectrum sharing arrangements between different networks

Abstract

A single chip radio transceiver includes circuitry that enables detection of radar signals to enable the radio transceiver to halt communications in overlapping communication bands to avoid interference with the radar transmitting the radar pulses. One design goal, however, is to avoid false triggers that result from spurious tones and omissions and that further detects radar signals even in circumstances in which a radar pulse has been masked or eliminated by interference. Accordingly, the radar detection block includes circuitry for detecting and measuring the radar signals in the presence of such interference. More specifically, the radar detection block includes a moving average filter, a threshold comparison state machine, and radar detection logic within software that is executed by a processor for determining whether a radar signal is present.

Claims

1. A radio transceiver, comprising:

radio front end for receiving, amplifying and down-converting and filtering a radio frequency (RF) signal to produce a low frequency received signal;

analog-to-digital converter (ADC) operatively coupled to receive the low frequency received signal, the ADC producing a digital low frequency signal;

baseband processor coupled to receive and process the digital low frequency signal;

radar detection circuit coupled to receive the digital low frequency signal, wherein the radar detection circuit measures magnitude levels of received signals, rise time, fall time, and detects a received radar pulse pattern and produces a corresponding control signal indicating whether a radar signal has been detected to the baseband processor; and

wherein the baseband processor does not produce digital signals whenever the control signal indicates that the radar signal has been received.

2. The radio transceiver of claim 1 wherein the radio front end includes a low noise amplifier (LNA) for amplifying the received RF signal and down-conversion circuitry for down-converting the received and amplified RF signals to produce a down-converted signal.

3. The radio transceiver of claim 2 wherein the down-converted signal comprises one of a low intermediate frequency (IF) or baseband signal.

4. The radio transceiver of claim 2 wherein the down-converted signal is produced to low pass filter circuitry for producing low pass filtered signals, wherein the low pass filtered signals are the low frequency signals produced to the analog-to-digital converter.

5. The radio transceiver of claim 2 wherein the down-converted signal is produced as I and Q channel signals.

6. The radio transceiver of claim 5 wherein the radar detection circuit receives I and Q channel digital low frequency signals.

7. The radio transceiver of claim 1 wherein the radar detection circuit measures signal magnitude rises above a plurality of thresholds, rise time from a first to a second threshold, time above the second threshold, and fall time from the second to the first threshold.

8. The radio transceiver of claim 7 wherein the radar detection circuit monitors at least one of a magnitude, a pulse width and timing and timing relationships of received pulses to determine whether a radar pulse has been received.

9. The radio transceiver of claim 8 wherein the radar detection circuit comprises a state machine for determining whether the received pulse has a specified characteristic of a radar pulse.

10. The radio transceiver of claim 8 wherein the control signal produced by the radar detection circuit is a binary signal that is set to a specified logic state whenever the radar signal is detected.

11. The radio transceiver of claim 1 wherein the control signal produced by the radar detection circuit includes threshold level and timing information wherein the baseband processor determines that a radar signal has been detected.

13. The radio transceiver of claim 1 wherein the baseband processor determines whether the pulse is a radar pulse based upon pulse width.

14. The radio transceiver of claim 13 wherein the baseband processor determines that the pulse is not a radar pulse if the pulse width is less than a specified amount.

15. The radio transceiver of claim 13 wherein the baseband processor determines that the pulse is not a radar pulse if the pulse width is greater than a specified amount.

16. The radio transceiver of claim 13 wherein the baseband processor determines that the pulse is not a radar pulse if a period between pulses is not approximately constant.

12. The radio transceiver of claim 12 wherein logic within the baseband processor monitors at least one of the magnitude, the pulse width and the timing and timing relationships of received pulses to determine whether a radar pulse has been received.

17. A radio transceiver, comprising:

radio front end for receiving, amplifying and down converting and filtering a radio frequency (RF) signal to produce a low frequency received signal;

analog to digital converter operatively coupled to receive the low frequency received signal, the ADC producing a digital low frequency signal;

baseband processor coupled to receive and process the digital low frequency signal;

radar detection circuit coupled to receive the digital low frequency signal, wherein the radar detection circuit further includes;

multiplication circuitry for receiving and squaring a low frequency digital signal;

moving average filter coupled to selectively receive an output signal produced by the multiplication circuitry, the moving average filter producing a moving average filtered signal;

first conversion block for converting a magnitude of the moving average filtered signal into decibel values; and

a threshold comparison state machine coupled to receive an output of the first conversion block in decibel values, the threshold machine for measuring rise time, fall time, and magnitude levels of received signals and detects a received radar pulse pattern and produces a corresponding control signal indicating whether a radar signal has been detected to the baseband processor; and

wherein the processor is coupled to receives rise time, fall time, and magnitude levels of received signals from the threshold comparison state machine, and wherein the processor determines whether the radar signal has been received and, if so, inhibits transmissions on overlapping frequency bands.

18. The radio transceiver of claim 17 wherein the radar detection circuit further includes a second conversion block coupled to selectively receive the output signal produced by the multiplication circuitry, the second conversion block converting the magnitude of the moving average filtered signal into decibel values.

19. The radio transceiver of claim 18 wherein the radar detection circuit further includes a summing node for subtracting a receiver gain setting from the magnitude in decibel values of the output of the multiplication circuitry.

20. The radio transceiver of claim 19 wherein the moving average filter and the first conversion block are coupled serially in a first branch and the second conversion block and the summing node are coupled in a second branch and wherein logic selects between the first and second branch based upon whether a wireless local area network (WLAN) signal is being received.

21. The radio transceiver of claim 20 wherein the first branch is selected if the wireless LAN signal is being received and the second branch is selected if the wireless LAN signal is not being received.

22. A method in a radio transceiver, comprising:

initiating a first timer to track a rise time of a pulse;

initiating a second timer to track a pulse width of the pulse above a specified threshold;

initiating a third timer to track fall time;

producing first, second and third timer values to a radar detection logic for determining whether a radar pulse has been detected.

23. The method of claim 22 wherein the radio transceiver processor stops transmitting in frequency bands that overlap with radar frequency bands if a radar signal has been received.

24. The method of claim 22 further including determining a received pulse has exceeded a first threshold as a part of initiating the first timer.

25. The method of claim 24 further including determining a received signal has exceeded a second threshold as a part of calculating a rise time.

26. The method of claim 25 further including determining the received signal has exceeded a second threshold tracking pulse width.

27. The method of claim 26 further including determining the received signal has fallen below the second threshold as a part of calculating the fall time.

28. The method of claim 27 further including determining the received signal has fallen below the first threshold as a part of calculating the fall time.

29. The method of claim 28 further including producing the rise time, the pulse width and the fall time to logic for determining if a radar pulse has been received.

30. The method of claim 29 wherein the logic is formed in hardware within the radar detection circuitry, the method further including determining if the radar signal has been received in the logic formed in hardware.

31. The method of claim 29 wherein the logic is formed within the baseband processor and is defined by computer instructions executed by the baseband processor, the method further including the baseband processor determining if the radar signal has been received.

32. The method of claim 31 wherein the radar detection circuitry produces measured parameters to the baseband processor to enable the logic within the baseband processor to determine if the radar signal has been received.