MULTI-PHASE MEASUREMENT SYSTEM WITH SYNCHRONIZED SIGMA DELTA CONVERTERS
First Claim
Patent Images
1. A measurement circuit comprising:
- a plurality of measured elements; and
a plurality of sigma-delta modulators operating in a synchronized multi-phase cycle in which each sigma-delta modulator has an associated measurement phase, each sigma-delta modulator producing a digital output as a function of charge packets received from a different subset of the measured elements during its associated measurement phase, each different subset including one of the measured elements that is shared by the subsets.
1 Assignment
0 Petitions
Accused Products
Abstract
A measurement system includes multiple analog sensor elements and multiple sigma-delta modulators for producing digital outputs. Each sigma-delta modulator receives charge packets from one or more sensor element and charge packets from a shared element (which may be a sensor or a reference element). The sigma-delta modulators are operated synchronously in separate phases, so that the shared element either delivers or does not deliver a charge packet of the sign desired by a sigma-delta modulator only during the phase associated with that sigma-delta modulator.
-
Citations
34 Claims
-
1. A measurement circuit comprising:
-
a plurality of measured elements; and
a plurality of sigma-delta modulators operating in a synchronized multi-phase cycle in which each sigma-delta modulator has an associated measurement phase, each sigma-delta modulator producing a digital output as a function of charge packets received from a different subset of the measured elements during its associated measurement phase, each different subset including one of the measured elements that is shared by the subsets. - View Dependent Claims (2, 3, 4, 5)
-
-
6. A measurement circuit comprising:
-
a first measured element;
a second measured element;
a third measured element;
a first charge packet integrating converter for producing first output as a function of a ratio of charge packets received;
a second charge packet integrating converter for producing a second output as a function of a ratio of charge packets received;
a drive signal source for providing drive signals to the first, second and third measured elements;
a switching circuit for selectively supplying charge packets from the first measured element and the third measured element to the first charge packet integrating converter and for selectively supplying charge packets from the second measured element and the third measured element to the second charge packet integrating converter; and
switch control logic for controlling the switching circuit so that the first charge packet integrating converter receives charge packets during a first phase and the second charge packet integrating converter receives charge packets during a second phase. - View Dependent Claims (7, 8, 9, 10, 11, 12, 13, 14, 15, 16)
-
-
17. A measurement circuit comprising:
-
a plurality of sensor elements;
a shared element; and
a plurality of sigma-delta modulators operating in a synchronized multi-phase cycle in which each sigma-delta modulator has an associated measurement phase, each sigma-delta modulator producing a digital output as a function of charge packets received from at least one of the sensor elements and the shared element during its associated measurement phase. - View Dependent Claims (20, 21, 22, 23)
-
-
18. The measurement circuit 17 and further comprising:
-
a switch circuit having a plurality of switches for delivering charge packets as functions of the sensor elements and the shared element to the plurality of sigma-delta modulators; and
switch logic control for controlling the switching circuit as a function of the measurement phase and the digital output of the sigma-delta modulator associated with that measurement phase. - View Dependent Claims (19)
-
-
24. A measurement circuit comprising:
-
a first sensor element;
a second sensor element;
a first charge packet integrating converter for producing first output as a function of a rate of packets received;
a second charge packet integrating converter for producing a second output as a function of a ratio of packets received;
a shared element;
a drive signal source for providing drive signals to the first and second sensor elements and the shared element;
a switching circuit for selectively supplying charge packets from the first sensor element and the shared element to the first charge packet integrating converter and for selectively supplying charge packets from the second sensor element and the shared element to the second charge packet integrating converter; and
switch control logic for controlling the switching circuit so that the first charge packet integrating converter receives charge packets during a first phase and the second charge packet integrating converter receives charge packets during a second phase. - View Dependent Claims (25, 26, 27, 28, 29, 30, 31, 32, 33, 34)
-
Specification