TWO-MASK PROCESS FOR METAL-INSULATOR-METAL CAPACITORS AND SINGLE MASK PROCESS FOR THIN FILM RESISTORS
First Claim
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1. A method of fabricating a MIM capacitor comprising:
- providing a semiconductor wafer; and
depositing semi-transparent metal layers for top and bottom electrodes of said MIM capacitor using a two-mask process for direct alignment;
said method eliminating the need for alignment trenches in an insulating or oxide layer.
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Abstract
MIM capacitors and thin film resistors are fabricated with at least one less lithographic step than the prior art methods. The process step reduction is realized by using semi-transparent metallic electrodes, fabricated with a two-mask process, which provides for direct alignment, and eliminates the need for alignment trenches in an additional layer.
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Citations
23 Claims
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1. A method of fabricating a MIM capacitor comprising:
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providing a semiconductor wafer; and
depositing semi-transparent metal layers for top and bottom electrodes of said MIM capacitor using a two-mask process for direct alignment;
said method eliminating the need for alignment trenches in an insulating or oxide layer. - View Dependent Claims (2, 3, 4)
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5. A method of fabricating a MIM capacitor comprising:
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providing a semiconductor wafer;
depositing semi-transparent metal layers on said semiconductor wafer for top and bottom electrodes of said MIM capacitor using a two-mask process for direct alignment and eliminating the need for alignment trenches in an insulating or oxide layer;
depositing a layer of dielectric material between said semi-transparent metal layers;
patterning and etching said top and bottom electrodes from said dielectric material and said semi-transparent metal layers, such that said bottom electrode aligns to a previous metal interconnect layer;
depositing an interlayer dielectric over said top and bottom electrodes;
forming lines through said interlayer dielectric to said top and bottom electrodes; and
depositing a metal liner and metal fill in said lines. - View Dependent Claims (6, 7)
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8. A method of fabricating a MIM capacitor on a semiconductor wafer having an insulating layer thereon, said method comprising:
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providing said semiconductor wafer having said insulating layer thereon;
depositing alternate layers of a dielectric material and a semi-transparent metal on said insulating layer;
patterning and etching said dielectric layer and said semi-transparent metal layer to form a top electrode;
performing direct alignment to a previous metal interconnect layer through said semi-transparent metal layer;
patterning and etching said capacitor dielectric layer and said semi-transparent metal layer to form a bottom electrode;
depositing an oxide interlayer dielectric over said top and bottom electrodes;
patterning and etching said oxide interlayer dielectric to form lines to said top and bottom electrodes; and
depositing a metal liner and metal fill in said lines. - View Dependent Claims (9, 10, 11, 12, 13, 14, 15, 16)
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17. A method of fabricating a thin film resistor comprising:
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providing a semiconductor wafer; and
depositing semi-transparent resistor material on said semiconductor wafer, using said semi-transparent resistor material to eliminate a mask alignment process step. - View Dependent Claims (18)
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19. A method of fabricating a thin film resistor comprising:
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providing a semiconductor wafer;
depositing a SiNx cap layer over an interconnect copper layer;
depositing a layer of semi-transparent resistor material over said SiNx cap; and
patterning and etching said semi-transparent resistor material with a photoresist mask, such that said resistor material aligns to said interconnect copper layer. - View Dependent Claims (20)
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21. A method of fabricating a MIM capacitor, said method comprising:
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providing a semiconductor wafer having an insulating layer thereon;
depositing alternate layers of a dielectric material and a semi-transparent metal on said insulating layer, wherein said semi-transparent metal comprises indium-tin-oxide having a resistivity in the range of 230 mohm-cm after exposure to an annealing temperature of approximately 250°
C. in a N2H2 atmosphere;
patterning and etching said dielectric layer and said semi-transparent metal layer to form a top electrode;
patterning and etching said capacitor dielectric layer and said semi-transparent metal layer to form a bottom electrode, such that said bottom electrode aligns to a previous metal interconnect layer;
depositing an oxide interlayer dielectric over said top and bottom electrodes;
patterning and etching said oxide interlayer dielectric to form lines to said top and bottom electrodes; and
depositing a metal liner and metal fill in said lines.
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22. A method of fabricating a thin film resistor comprising:
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providing a semiconductor wafer;
depositing a SiNx cap layer over an interconnect copper layer on said semiconductor wafer;
depositing a layer of semi-transparent resistor material over said SiNx cap to eliminate a mask alignment process step; and
patterning and etching said semi-transparent resistor material with a photoresist mask, such that said resistor material aligns to said interconnect copper layer. - View Dependent Claims (23)
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Specification