Submount and semiconductor device

• US 20050067636A1
• Filed: 03/03/2003
• Published: 03/31/2005
• Est. Priority Date: 03/06/2002
• Status: Active Grant

• Current Assignee: Sumitomo Electric Industries Limited (Sumitomo Corporation)
• Original Assignee: Sumitomo Electric Industries Limited (Sumitomo Corporation)
• Inventors: Ishii, Takashi, Amoh, Teruo, Tsuzuki, Yasushi, Higaki, Kenjiro
• Granted Patent: US 7,298,049 B2
• Time in Patent Office: Days
• US Class Current: 257/232
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01L 33/62 Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
• CPC Class Codes: H01S 5/0237 by soldering
• CPC Class Codes: H01S 5/02476 Heat spreaders, i.e. improving heat flow between laser chip and heat dissipating elements

Abstract

A submount that enables the reliable mounting of a semiconductor light-emitting device on it, and a semiconductor unit incorporating the submount. A submount 3 comprises (a) a substrate 4; and (b) a solder layer 8 formed on the top surface 4f of the substrate 4. The solder layer 8 before melting has a surface roughness, Ra, of at most 0.18 μm. It is more desirable that the solder layer 8 before melting have a surface roughness, Ra, of at most 0.15 μm, yet more desirably at most 0.10 μm. A semiconductor unit 1 comprises the submount 3 and a laser diode 2 mounted on the solder layer 8 of the submount 3.

Claims

1. A submount, comprising:

(a) a submount substrate; and

(b) a solder layer that;

(b1) is formed on the top surface of the submount substrate; and

(b2) has a surface roughness, Ra, of at most 0.18 μ

m before the solder layer is melted.

2. A submount as defined by claim 1, wherein the solder layer has a surface roughness, Ra, of at most 0.15 μ

m before it is melted.

3. A submount as defined by claim 1, wherein the solder layer has a surface roughness, Ra, of at most 0.10 μ

m before it is melted.

4. A submount as defined by claim 1, wherein the solder in the solder layer has an average crystal-grain diameter of at most 3.5 μ

m before it is melted.

5. A submount as defined by claim 1, wherein the top surface of the submount substrate has a surface roughness, Ra, of at most 0.10 μ

m.

6. A submount as defined by claim 1, the submount further comprising a solder-protecting barrier layer formed between the submount substrate and the solder layer.

7. A submount as defined by claim 6, the submount further comprising an electrode layer formed between the submount substrate and the solder-protecting barrier layer.

8. A submount as defined by claim 7, the submount further comprising between the submount substrate and the solder-protecting barrier layer:

(a) an intimate-contact layer formed such that it makes contact with the top surface of the submount substrate; and

(b) an element diffusion-preventing layer formed on the intimate-contact layer;

the electrode layer being placed on the element diffusion-preventing layer.

9. A submount as defined by claim 8, wherein:

(a) the intimate-contact layer comprises titanium;

(b) the element diffusion-preventing layer comprises platinum;

(c) the electrode layer comprises gold;

(d) the solder-protecting barrier layer comprises platinum; and

(e) the solder layer comprises gold-tin-based solder.

10. A submount as defined by claim 1, wherein the submount substrate comprises an aluminum nitride-sintered body.

11. A semiconductor unit, comprising:

(a) a submount that comprises;

(a1) a submount substrate; and

(a2) a solder layer that;

(a2a) is formed on the top surface of the submount substrate; and

(a2b) has a surface roughness, Ra, of at most 0.18 μ

m before the solder layer is melted; and

(b) a semiconductor light-emitting device mounted on the solder layer.