Signal processor

• US 20050069285A1
• Filed: 09/28/2004
• Published: 03/31/2005
• Est. Priority Date: 09/29/2003
• Status: Active Grant

• Current Assignee: Pioneer Corporation
• Original Assignee: Pioneer Corporation
• Inventors: Miyashita, Masahiko, Yamada, Takao, Ohyama, Nobuo, Atsumi, Kou
• Granted Patent: US 7,742,686 B2
• Time in Patent Office: Days
• US Class Current: 386/206
• CPC Class Codes: G11B 2220/2529 Mini-discs
• CPC Class Codes: G11B 2220/2545 CDs
• CPC Class Codes: G11B 2220/2562 DVDs [digital versatile discs]; Digital video discs; MMCDs; HDCDs
• CPC Class Codes: G11B 27/105 of operating discs
• CPC Class Codes: G11B 27/11 by using information not detectable on the record carrier
• CPC Class Codes: G11B 27/34 Indicating arrangements indicating means incorporated in magazine or cassette G11B23/046 and G11B23/0875; indicating measured values in general G01D

Abstract

A point setting part sets a position on a time axis of a main image signal corresponding to a capture instruction, as a registration point. A playback control part causes a buffer memory to output an image frame from the registration point used as a starting point in response to a given playback instruction. A capture processing part generates a registration image based on at least one image frame of the main image signal and stores the registration image, the at least one image frame being placed in a neighborhood of the registration point. A point recording part writes the registration point as a recorded point into a memory and writes the registration image as a recorded image corresponding to the recorded point into the memory. A point calling part reads out the recorded image and the recorded point from the memory in response to a given calling instruction. The point setting part sets the recorded point and the recorded image as the registration point and the registration image, respectively.

Claims

1. A signal processor for processing image signals including a plurality of image frames, comprising:

a buffer memory for storing the image signal and outputting the stored signal as a main image signal;

a point setting part for setting, in response to a given capture instruction, a position on a time axis of the main image signal corresponding to the capture instruction, as a registration point;

a playback control part for causing said buffer memory to output the image frame from the registration point used as a starting point in response to a given playback instruction;

a capture processing part for generating a registration image based on at least one image frame of the main image signal outputted from said buffer memory and storing the registration image, said at least one image frame being placed in a neighborhood of the registration point;

a point recording part for writing the registration point set by the point setting part as a recorded point into a memory, and writing the registration image stored in the capture processing part as a recorded image corresponding to the recorded point into said memory; and

a point calling part for reading out the recorded image and the recorded point from said memory in response to a given calling instruction,

wherein said point setting part sets the recorded point and the recorded image read out from said memory by said point calling part, as the registration point and the registration image, respectively.

2. A signal processor according to claim 1, further comprising a memory interface detachably connected to a recording device having said memory,

wherein said point recording part writes the registration point and the registration image into said memory through said memory interface, and said point calling part reads out the registration point and the registration image from said memory through said memory interface.

3. A signal processor according to claim 1, further comprising:

a first video output part for outputting the main image signal inputted from the buffer memory to a display device; and

a second video output part for outputting either one of the registration image and the recorded image from said capture processing part to the display device.

4. A signal processor according to claim 3, wherein said capture processing part superimposes the registration image onto the main image signal to generate a composite image signal, and provides the composite image signal to said second video output part.

5. A signal processor according to claim 3, wherein said capture processing part superimposes a plurality of the recorded images to generate a composite image signal, and provides the composite image signal to the second video output part.

6. A signal processor according to claim 1, further comprising an operation part for giving the playback instruction, the capture instruction and the calling instruction in response to an external operation.

7. A signal processor according to claim 6, wherein

said operation part includes a rotary control panel, and

said playback control part has a speed control function to control a playback speed of the main image signal in real time in response to an instruction based on a rotation angle and a rotation direction of said rotary control panel.

8. A signal processor according to claim 7, wherein said playback control part causes said buffer memory to output the main image signal in a playback direction of either one of a forward direction and a reverse direction according to the rotation direction of said rotary control panel.

9. A signal processor according to claim 1, further comprising an audio output part for supplying an audio signal to a playback device,

wherein said buffer memory stores the audio signal, together with the image signal and outputs the stored signal, and said playback control part causes the buffer memory to output and provide the audio signal to said audio output part.

10. A signal processor according to claim 9, further comprising:

a loading mechanism for detachably loading an information recording medium;

a recording medium driving part for reading out a playback signal from said information recording medium; and

a signal processing part for decoding the playback signal to generate the image signal and the audio signal.

11. A signal processor for playing back video, comprising:

an operation part having a rotary control panel;

a playback control part for controlling a playback speed of the video in real time according to rotation of said rotary control panel;

a point setting part for setting, in response to a capture instruction given from outside, a position on a time axis of the video corresponding to the capture instruction, as a registration point;

a capture processing part for capturing at least one image frame constituting the video under playback and for generating a registration image corresponding to the registration point on the basis of the image frame;

a point recording part for writing the registration point and the registration image as a recorded point and a recorded image, respectively, into a memory; and

a point calling part for reading out, in response to a calling instruction given from outside, the recorded image from said memory and displaying the recorded image on a display device.