Atomic laminates for diffusion barrier applications
First Claim
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1. A method of forming a diffusion barrier for a semiconductor device, comprising:
- providing a semiconductor substrate; and
forming a substantially amorphous diffusion barrier layer overlying at least a portion of the semiconductor substrate, where the barrier layer comprises a multilayer diffusion barrier comprised of a plurality of sub-layers, each having a thickness predetermined to result in a substantially amorphous state, to inhibit diffusion of a chemical species through the diffusion barrier.
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Abstract
The present invention relates to a very thin multilayer diffusion barrier for a semiconductor device and fabrication method thereof. The multilayer diffusion barrier according to the present invention is fabricated by forming a very thin, multilayer diffusion barrier composed of even thinner sub-layers, where the sub-layers are only a few atoms thick. The present invention provides a diffusion barrier layer for a semiconductor device which is in a substantially amorphous state and thermodynamically stable, even at high temperatures.
94 Citations
43 Claims
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1. A method of forming a diffusion barrier for a semiconductor device, comprising:
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providing a semiconductor substrate; and
forming a substantially amorphous diffusion barrier layer overlying at least a portion of the semiconductor substrate, where the barrier layer comprises a multilayer diffusion barrier comprised of a plurality of sub-layers, each having a thickness predetermined to result in a substantially amorphous state, to inhibit diffusion of a chemical species through the diffusion barrier. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18)
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- 19. A diffusion barrier comprising a plurality of stacked sub-layers, each sub-layer having a thickness predetermined to inhibit the formation of a crystalline lattice, to inhibit diffusion of a chemical species through the diffusion barrier.
- 30. An integrated circuit comprising a substrate, having an electrically conductive feature disposed on said substrate, further comprising a diffusion barrier interposed between said substrate and said electrically conductive feature, said diffusion barrier comprising a plurality of stacked sub-layers, each sub-layer having a thickness predetermined to inhibit the formation of a crystalline lattice.
- 32. A circuit structure comprising a substrate and an electrical interconnect comprised of copper (Cu), further comprising a diffusion barrier interposed between said substrate and said electrical interconnect, said diffusion barrier comprising a plurality of stacked sub-layers.
- 38. A multilayer diffusion barrier comprised of atomically thin films in which the surface adhesion of each interface inhibits the formation of a lattice in the bulk of the individual film layers, inhibiting diffusion across the barrier.
- 41. A multilayer structure comprised of three or more sub-layers, wherein the interface of each of the sub-layers dominates the lattice formation on the sub-layers, preventing the formation of a lattice and grain boundaries, to inhibit diffusion of a chemical species through the barrier.
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43. A multilayer diffusion barrier for inhibiting diffusion of chemical species there through, comprising a plurality of stacked layers comprised of alternating films of at least two different metals, the thickness of each of said films being predetermined to substantially eliminate work hardening.
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