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System and method for digital radio receiver

  • US 20050070325A1
  • Filed: 08/10/2004
  • Published: 03/31/2005
  • Est. Priority Date: 09/25/2003
  • Status: Active Grant
First Claim
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1. A communications system, comprising:

  • a processor;

    a variable oscillator;

    a radio frequency (RF) quadrature demodulator;

    a variable capacitor, coupled to the RF quadrature demodulator output;

    a continuous-time, sigma-delta analog-to-digital converter (ADC), coupled between the processor and the RF quadrature mixer; and

    a frequency divider, coupled to the processor, the variable oscillator, the RF quadrature demodulator, and the ADC;

    wherein the processor, the variable oscillator, the frequency divider, the RF quadrature demodulator, the variable capacitor, and the ADC are integrated on a single, semiconductor chip;

    wherein the ADC samples an output of the RF quadrature demodulator; and

    wherein the processor sets a frequency of the communications system by controlling the variable oscillator, the frequency divider and the variable capacitor.

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