Method and apparatus for mode selection for high voltage integrated circuits

• US 20050073785A1
• Filed: 10/03/2003
• Published: 04/07/2005
• Est. Priority Date: 10/03/2003
• Status: Active Grant

• Current Assignee: Power Integrations Incorporated
• Original Assignee: Power Integrations Incorporated
• Inventors: Wong, Kent, Wang, Zhao-Jun, Djenguerian, Alex B., Smith, William B.
• Granted Patent: US 7,157,813 B2
• Time in Patent Office: Days
• US Class Current: 361/90
• CPC Class Codes: H03K 19/1732 by limitation or reduction of the pin/gate ratio for data-processing equipment G06F1/22

Abstract

A method is disclosed to add functionality to a terminal of a high voltage integrated circuit without the penalty of additional high voltage circuitry. The benefit is that alternative modes of operation can be selected for testing, trimming parameters of the integrated circuit, or any other purpose without the cost of an additional terminal. In one embodiment, ordinary low voltage circuitry monitors the voltage on the terminal that normally is exposed to high voltage. The configuration of a simple voltage detector and an ordinary latch allows easy entry into the test and trimming mode when the integrated circuit is not in the intended application, but prohibits entry into the test and trimming mode when the integrated circuit operates in the intended application.

Claims

1. An integrated circuit, comprising:

a functional circuit coupled to a plurality of terminals including first, second and third terminals of the integrated circuit, wherein the first terminal is adapted to withstand a first maximum voltage relative to the second terminal, wherein the third terminal is adapted to withstand a second maximum voltage relative to the second terminal, wherein the second maximum voltage is substantially greater than the first maximum voltage;

a detector circuit coupled to detect a voltage at the third terminal, the detector circuit having a first state when the voltage at the third terminal is less than a first threshold, the detector having a second state when the voltage on the third terminal is greater than a second threshold; and

a selector circuit coupled to the detector circuit and the functional circuit, the selector circuit to select one of at least two distinct modes of operation for the functional circuit in response to the plurality of terminals.

2. The integrated circuit of claim 1 wherein the selector circuit is adapted to hold the second state of the detector circuit after the detector circuit reverts to the first state.

3. The integrated circuit of claim 2 wherein the selector circuit comprises latch circuitry.

4. The integrated circuit of claim 1 wherein the first terminal is not coupled to any circuitry external to the integrated circuit.

5. The integrated circuit of claim 1 wherein the third terminal is coupled to high voltage in a switching power supply.

6. The integrated circuit of claim 1 wherein the functional circuit is included in a controller in a switching power supply.

7. The integrated circuit of claim 1 wherein the first terminal is one of a power supply terminal, a control terminal, and a functional terminal for the integrated circuit.

8. The integrated circuit of claim 1 wherein the at least two distinct modes of operation for the functional circuit includes a normal mode of operation and an alternative mode of operation.

9. The integrated circuit of claim 8 wherein the alternative mode of operation is a test mode that is different from the normal mode of operation.

10. The integrated circuit of claim 8 wherein the alternative mode of operation is a trimming mode that is different from the normal mode of operation.

11. The integrated circuit of claim 8 wherein the alternative mode of operation is also a normal mode of operation.

12. The integrated circuit of claim 1 wherein the first and second thresholds depend on the voltage applied to the first terminal.

13. The integrated circuit of claim 1 further comprising a high voltage buffer circuit coupled to the third terminal, the functional circuit and the detector circuit such that the functional circuit and the detector circuit are coupled to the third terminal through the high voltage buffer circuit.

14. The integrated circuit of claim 13 further comprising a voltage regulator circuit coupled to the first terminal, the high voltage buffer circuit and the functional circuit, wherein the functional circuit is coupled to the third terminal through the voltage regulator circuit and the high voltage buffer circuit.