System and associated method for the synchronization and control of multiplexed payloads over a telecommunications network

• US 20050074013A1
• Filed: 11/19/2004
• Published: 04/07/2005
• Est. Priority Date: 02/02/1998
• Status: Active Grant

• Current Assignee: Charles W.K. Gritton, Jeffrey A. Noel, Paul C. Hershey
• Original Assignee: Charles W.K. Gritton, Jeffrey A. Noel, Paul C. Hershey
• Inventors: Gritton, Charles W. K., Hershey, Paul C., Noel, Jeffrey A.
• Granted Patent: US 7,471,696 B2
• Time in Patent Office: Days
• US Class Current: 370/395.510
• CPC Class Codes: A63F 2003/00208 Circular game board
• CPC Class Codes: A63F 2011/0018 integrated in the game board
• CPC Class Codes: A63F 2250/1063 Timers
• CPC Class Codes: A63F 3/0423 Word games, e.g. scrabble electric A63F3/0421; two-dimensional puzzles with rotating rings or discs A63F9/0811, A63F9/0819
• CPC Class Codes: H04J 3/0685 Clock or time synchronisation in a node; Intranode synchronisation
• CPC Class Codes: H04J 3/07 using pulse stuffing for systems with different or fluctuating information rates or bit rates
• CPC Class Codes: H04J 3/1611 Synchronous digital hierarchy [SDH] or SONET H04J3/1664 takes precedence for interactions with OTN
• CPC Class Codes: H04L 2012/6459 Multiplexing, e.g. TDMA, CDMA
• CPC Class Codes: Y10S 370/907 Synchronous optical network, SONET

Abstract

A system and associated method for the synchronization and control of multiplexed payloads over a telecommunications network wherein the asynchronous timing relationships between multiplexed payloads having varied points of origin are retained subsequent to signal processing of the payloads for further transmission to a destination point. System modules 22 include a network interface section 30, a synchronization, multiplexing and control (SMC) section 50, and a processing section 110. The SMC section 50 includes network interface bus circuitry, payload segmentation and re-assembly circuitry, control and management memory and related circuitry, payload re-assembly circuitry, and processor bus interface circuitry. The processing section of module 22 provides means for data compression, echo cancellation, error correction coding, or voice and data encryption/decryption. The module 22 is dynamically configured through a software management and control interface. The software permits dynamic loading of module 22 control logic and provides inband interpretation of performance statistics. Differing sets of control parameters are supplied to the module 22 as dictated by the interpretation of network performance parameters, or through operator supplied modifications. Operator modifications are preferably facilitated through an attached GUI (Graphical User Interface) and associated input devices such as a keyboard and/or mouse.

Claims

1. A method of processing a telecommunication signal on a telecommunications network, comprising the steps of:

receiving a synchronous telecommunication signal containing multiplexed, asynchronous payload signals each having a data rate;

extracting the asynchronous payload signals from the synchronous telecommunication signal;

sequentially framing the asynchronous payload signals with a corresponding clock pulse and framing pulse;

synchronizing the sequentially framed asynchronous payload signals together at a data rate higher than that of the asynchronous payload data rate;

processing the synchronized payload signals with a signal processing algorithm;

restoring the processed payload signals to their asynchronous relationships, whereby processed asynchronous payload signals are provided;

multiplexing the restored asynchronous payload signals into a second telecommunication signal; and

transmitting the second telecommunication signal to a destination.

2. The method of claim 1 wherein the step of synchronizing the payload signals comprises the step of multiplexing the asynchronous payload signals.

3. The method of claim 1 comprising the step of generating stuff-bit frames for combining with said asynchronous payload signal frames.

4. The method of claim 3 wherein the step of synchronizing the payload signals comprises the steps of

combining asynchronous payload signal frames and stuff bit frames to form synchronous payload signals;

and

generating a master frame pulse signal.

5. The method of claim 2 wherein the step of processing the synchronous payload signals comprises the steps of

demultiplexing the synchronous payload signals;

and

separating the asynchronous payload signal frames from the stuff-bit frames.

6. The method of claim 1 wherein the processing algorithm is selected from the group consisting of data compression algorithms, echo cancellation algorithms, error correction coding algorithms, voice encryption/decryption algorithms, data encryption/decryption algorithms, and combinations thereof.

7. A method of processing a telecommunication signal on a telecommunications network, comprising the steps of:

receiving a synchronous telecommunication signal containing multiplexed, asynchronous payload signals each having a data rate;

extracting the asynchronous payload signals from the synchronous telecommunication signal;

sequentially framing the asynchronous payload signals with a corresponding clock pulse and framing pulse;

synchronizing the sequentially framed asynchronous payload signals together at a data rate higher than that of the asynchronous payload data rate;

generating stuffed payload signals identified by random stuff patterns for the identification of the stuffed payload signals among the synchronized payload frame groups;

distinguishing stuff payload signals from payload signals by the random stuff patterns through a finite state machine configured in a memory device, the memory device storing state transition tables;

processing the synchronized payload signals identified by the finite state machine with a signal processing algorithm;

restoring the processed payload signals to their asynchronous relationships, whereby processed asynchronous payload signals are provided;

multiplexing the restored asynchronous payload signals into a second telecommunication signal; and

transmitting the second telecommunication signal to a destination.

8. The method of claim 7 wherein the finite state machine memory is random access memory.

9. A method of processing a telecommunication signal on a telecommunications network, comprising the steps of:

receiving a synchronous telecommunication signal containing multiplexed, asynchronous payload signals each having a data rate;

extracting the asynchronous payload signals from the synchronous telecommunication signal;

sequentially framing the asynchronous payload signals with a corresponding clock pulse and framing pulse;

synchronizing the sequentially framed asynchronous payload signals together at a data rate higher than that of the asynchronous payload data rate;

generating stuff payload signals identified by random stuff patterns for the identification of the stuffed payload signals among the synchronized payload frame groups;

distinguishing stuff payload signals from payload signals by the random stuff patterns through a first finite state machine configured in a memory device, the memory device storing state transition tables;

processing the synchronized payload signals identified by the finite state machine with a signal processing algorithm;

distinguishing stuff payload signals from payload signals by the random stuff patterns through a second finite state machine configured in a memory device, the memory device storing state transition tables;

restoring the processed payload signals identified by the second finite state machine to their asynchronous relationships, whereby processed asynchronous payload signals are provided;

multiplexing the restored asynchronous payload signals into a second telecommunication signal; and

transmitting the second telecommunication signal to a destination.

10. A device for processing a telecommunication signal on a telecommunications network, comprising:

a first interface for receiving a synchronous telecommunication signal containing multiplexed, asynchronous payload signals each having a data rate;

an extraction circuit for separating the asynchronous payload signals from the synchronous telecommunication signals received though the first interface;

a framing circuit for sequentially framing the asynchronous payload signals extracted by the extraction circuit with a corresponding clock pulse and framing pulse;

a synchronization circuit for synchronizing the sequentially framed asynchronous payload signals passed from said framing circuit together at a data rate higher than that of the asynchronous payload data rate;

at least one data processor for processing the synchronized payload signals of the synchronization stage with a signal processing algorithm at the data rate of said synchronization stage;

a reassembly circuit for restoring the processed payload signals to their asynchronous relationships at a rate equal to said data rate of the synchronization stage, whereby processed asynchronous payload signals are provided; and

a multiplexer for multiplexing the restored asynchronous payload signals of the reassembly stage into a second telecommunication signal for retransmission of the resulting telecommunication signal through said first interface to a destination.

11. A device for processing a telecommunication signal on a telecommunications network, comprising:

a first interface for receiving a synchronous telecommunication signal containing multiplexed, asynchronous payload signals each having a data rate;

an extraction circuit for separating the asynchronous payload signals from the synchronous telecommunication signals received though the first interface;

a framing circuit for sequentially framing the asynchronous payload signals extracted by the extraction circuit with a corresponding clock pulse and framing pulse;

a synchronization circuit for synchronizing the sequentially framed asynchronous payload signals passed from said framing circuit together at a data rate higher than that of the asynchronous payload data rate;

a stuff frame generator for generating stuffed payload signals among synchronized payload frames, the stuffed signals being characterized by random stuff patterns for the identification of the stuffed payload signals among the synchronized payload frame groups;

a finite state machine configured in a memory device for distinguishing stuffed payload signals from payload signals based on state transition tables stored in the memory device;

at least one data processor for processing the synchronized payload signals identified by the finite state machine with a signal processing algorithm at the data rate of said synchronization stage;

a reassembly circuit for restoring the processed payload signals to their asynchronous relationships at a rate equal to said data rate of the synchronization stage, whereby processed asynchronous payload signals are provided;

a multiplexer for multiplexing the restored asynchronous payload signals of the reassembly stage into a second telecommunication signal for retransmission of the resulting telecommunication signal through said interface to a destination.

12. A device for processing a telecommunication signal on a telecommunications network, comprising:

a first interface for receiving a synchronous telecommunication signal containing multiplexed, asynchronous payload signals each having a data rate;

an extraction circuit for separating the asynchronous payload signals from the synchronous telecommunication signals received though the first interface;

a framing circuit for sequentially framing the asynchronous payload signals extracted by the extraction circuit with a corresponding clock pulse and framing pulse;

a synchronization circuit for synchronizing the sequentially framed asynchronous payload signals passed from said framing circuit together at a data rate higher than that of the asynchronous payload data rate;

a stuff frame generator for generating stuffed payload signals among synchronized payload frames, the stuffed signals being characterized by random stuff patterns for the identification of the stuffed payload signals among the synchronized payload frame groups;

a first finite state machine configured in a memory device for distinguishing stuffed payload signals from payload signals by the random stuff patterns, the memory device storing state transition tables;

at least one data processor for processing the synchronized payload signals identified by the finite state machine with a signal processing algorithm at the data rate of said synchronization stage;

a second finite state machine configured in a memory device for distinguishing stuffed payload signals from payload signals based on state transition tables stores in the memory device;

a reassembly circuit for restoring the processed payload signals identified by said second finite state machine to their asynchronous relationships at a rate equal to said data rate of the synchronization stage, whereby processed asynchronous payload signals are provided;

a multiplexer for multiplexing the restored asynchronous payload signals of the reassembly stage into a second telecommunication signal for retransmission of the resulting telecommunication signal through said interface to a destination.