Method and apparatus for detecting the type of interface to which a peripheral device is connected

• US 20050076171A1
• Filed: 05/20/2004
• Published: 04/07/2005
• Est. Priority Date: 07/08/1998
• Status: Active Grant

• Current Assignee: Microsoft Technology Licensing LLC (Microsoft Corporation)
• Original Assignee: David L. Holo, Keith Mullins, Lord Nigel Featherston, Mark T. Hanson, Mark W. Casebolt, Nathan C. Sherman, Terry M. Lipscomb, Victor P. Drake
• Inventors: Hanson, Mark T., Sherman, Nathan C., Casebolt, Mark W., Featherston, Lord Nigel, Holo, David L., Mullins, Keith, Drake, Victor P., Lipscomb, Terry M.
• Granted Patent: US 7,096,435 B2
• Time in Patent Office: Days
• US Class Current: 710/313
• CPC Class Codes: G06F 13/4068 Electrical coupling
• CPC Class Codes: G06F 13/4086 Bus impedance matching, e.g. termination

Abstract

A peripheral device is connectable to a computer having one of a first interface and a second interface. The first interface communicates with the peripheral device over a differential data connection having a first data conductor and a second data conductor. The second interface communicates with the peripheral device over a clock conductor and a single ended data connection which includes a data conductor. The peripheral device has first and second communication conductors configured for connection to the first and second data conductors in the differential data connection when the computer includes the first interface and is configured for connection to the first data conductor in the single ended data connection and the clock conductor when the computer is provided with the second interface. The peripheral device includes an interface detection component coupled to the first and second communication conductors and configured to detect which of the first and second interfaces the peripheral device is connected to. The peripheral device also includes a controller component configured to communicate between the peripheral device according to a protocol corresponding to the detected interface.

Claims

1. A peripheral device connectable to a computer that communicates with the peripheral device through an interface that includes at least two interface conductors and that is either a USB interface or a PS/2 interface, the USB interface having first and second data conductors, that carry first and second data signals, as the two interface conductors and the PS/2 interface having a clock conductor, that carries a clock signal, and a data conductor, that carries a data signal, as the two interface conductors, the peripheral device comprising:

first and second peripheral device conductors operably connectable to the interface conductors such that signals can be communicated between the peripheral device and the computer over the interface conductors and the peripheral device conductors;

an interface detector configured to detect whether the computer has the USB interface or the PS/2 interface by sensing signals communicated over at least one of the peripheral device conductors; and

a controller configured to communicate with the computer based on which interface is detected.

2. The peripheral device of claim 1 wherein the controller and the interface detector are embodied on a single microprocessor.

3. The peripheral device of claim 1 wherein the interface detector is configured to sense the signals communicated over the at least one of the peripheral device conductors by attempting to set a predetermined logical signal level on the peripheral device conductor and sensing whether the peripheral device conductor is at the predetermined logical signal level.

4. A method implemented on a peripheral device, comprising:

monitoring signals on at least one conductor used for communicating between the peripheral device and a computer, the computer being operably connected to the peripheral device, to detect whether the computer comprises a USB interface or a PS/2 interface; and

communicating over the at least one conductor based on the interface detected.

5. The method of claim 4 wherein monitoring comprises:

monitoring signals on a conductor that carries a data signal when the interface comprises the USB interface and a data signal when the interface comprises the PS/2 interface.

6. The method of claim 4 wherein monitoring comprises:

monitoring signals on a conductor that carries a data signal when the interface comprises the USB interface and a clock signal when the interface comprises the PS/2 interface.

7. The method of claim 4 wherein monitoring comprises:

monitoring signals on a plurality of conductors.

8. A computer system, comprising:

a computer that has a peripheral interface that comprises one of a USB interface and a PS/2 interface; and

a peripheral device, operably connected to the computer through the peripheral interface, configured to detect which peripheral interface it is connected to based on at least one of two data signals, if the peripheral interface is the USB interface, and based on at least one of a clock signal and a data signal, if the peripheral interface is the PS/2 interface.

9. The computer system of claim 8 wherein the computer includes first and second interface conductors that carry the clock signal and the data signal when the peripheral interface comprises the PS/2 interface.

10. The computer system of claim 9 wherein the first and second interface conductors carry the data signals when the peripheral interface comprises the USB interface.

11. The computer system of claim 10 wherein the peripheral device comprises:

first and second peripheral device conductors connected to the interface conductors such that signals can be communicated between the peripheral device and the computer over the interface conductors and the peripheral device conductors.

12. The computer system of claim 11 wherein the peripheral device comprises:

an interface detector configured to detect whether the peripheral device is connected to the USB interface or the PS/2 interface by sensing signals communicated over at least one of the peripheral device conductors.

13. The computer system of claim 12 wherein the peripheral device comprises:

a controller configured to communicate with the computer based on which interface is detected.

14. The computer system of claim 13 wherein the controller and the interface detector are embodied on a single microprocessor.

15. The computer system of claim 13 wherein the interface detector is configured to sense the signals communicated over the at least one of the peripheral device conductors by attempting to set a predetermined logical signal level on the peripheral device conductor and sensing whether the peripheral device conductor is at the predetermined logical signal level.