Cellular modem processing

• US 20050079889A1
• Filed: 10/09/2003
• Published: 04/14/2005
• Est. Priority Date: 10/09/2003
• Status: Active Grant

• Current Assignee: North Star Innovations Inc. (Wi-LAN Inc.)
• Original Assignee: Freescale Semiconductor, Inc. (NXP Semiconductors NV)
• Inventors: Khawand, Charbel, Chun, Christopher K.Y., Tao, Jianping, Hayes, David J., Vaglica, John J., Elledge, Mark E., Vu, Mieu V., Goldberg, Arthur M., Cruz, Arnaldo R., Corleto-Mena, Jose G.
• Granted Patent: US 7,623,894 B2
• Time in Patent Office: Days
• US Class Current: 455/557
• CPC Class Codes: H04W 84/08 Trunked mobile radio systems

Abstract

A cellular mobile station including a modem processor and memory. The memory includes instructions for the modem processor to perform layer 1 processor operations, layer 2 processor operations, and layer 3 processor operations. The modem processor executes the instructions to perform processor operations for the cellular mobile station to communication data as per a cellular communications protocol. In one example, the mobile station includes different levels of memory to provide different deterministic access times

Claims

1. Integrated circuitry comprising:

communication interface circuitry;

a cellular modem processor which executes instructions from an instruction set; and

at least one memory coupled to the cellular modem processor, the at least one memory storing instructions, the instructions including instructions that when executed by the cellular modem processor perform a layer 1 processor operation of a cellular communication protocol by the cellular modem processor, instructions that when executed by the cellular modem processor perform a layer 2 processor operation of the cellular communication protocol by the cellular modem processor, and instructions that when executed by the cellular modem processor perform a layer 3 processor operation of the cellular communication protocol by the cellular modem processor.

2. The integrated circuitry of claim 1 further comprising:

a hardware accelerator, the hardware accelerator implementing a security feature, the security feature including one of generating a digital signature for a section of instructions of the cellular modem processor and encrypting and decrypting key variables.

3. The integrated circuitry of claim 1 wherein the cellular modem processor is characterized as a digital signal processor.

4. The integrated circuitry of claim 1 wherein the cellular modem processor is characterized as a microcontroller unit processor.

5. The integrated circuitry of claim 1 wherein the layer 1 processor operation is one of a modulation processor operation, a demodulation processor operation, an interleaving processor operation, a deinterleaving processor operation, a channel encoding processor operation, a channel decoding processor operation, a channel equalization processor operation, a synchronization processor operation, an automatic gain control processor operation, and an automatic frequency control processor operation.

6. The integrated circuitry of claim 1 wherein the instructions include instructions for performing by the cellular modem processor, a modulation processor operation, a demodulation processor operation, an interleaving processor operation, a deinterleaving processor operation, a channel encoding processor operation, a channel decoding processor operation, a channel equalization processor operation, a synchronization processor operation, an automatic gain control processor operation, and an automatic frequency control processor operation.

7. The integrated circuitry of claim 1 wherein the layer 2 processor operation is one of a medium access control processor operation and a logical link control processor operation.

8. The integrated circuitry of claim 1 wherein the layer 3 processor operation is one of a call control (CC) management processor operation, a mobility management (MM) processor operation, a subnet convergence protocol (SNDCP) processor operation, and a radio resource (RR) management processor operation.

9. The integrated circuitry of claim 1 wherein the instructions include instructions for performing by the cellular modem processor, a call control (CC) management processor operation, a mobility management (MM) processor operation, a subnet convergence protocol (SNDCP) processor operation, and a radio resource (RR) management processor operation.

10. The integrated circuitry of claim 1 wherein the cellular modem processor and at least some of the at least one memory are implemented on a single integrated circuit.

11. The integrated circuitry of claim 1 wherein at least some of the at least one memory is implemented on a separate integrated circuit from the cellular modem processor.

12. The integrated circuitry of claim 1 wherein the cellular modem processor and the at least one memory are implemented on a single integrated circuit.

13. The integrated circuitry of claim 1 wherein the at least some of the at least one memory is implemented in hierarchical levels of memory to provide a plurality of deterministic access times.

14. The integrated circuitry of claim 13 wherein each hierarchical level of memory further comprises non volatile memory and/or volatile memory.

15. The integrated circuitry of claim 1 wherein the at least one memory further comprises hierarchical levels of cache memory.

16. The integrated circuitry of claim 1 further comprising:

a second processor, the second processor executing application instructions and not performing modem processor operations.

17. The integrated circuitry of claim 1 further comprising:

a second processor, wherein the cellular modem processor and the second processor are implemented on a single integrated circuit.

18. The integrated circuitry of claim 17 further comprising:

at least one shared memory accessible by both the cellular modem processor and the second processor.

19. The integrated circuitry of claim 18 wherein the at least one shared memory is divided into at least two regions, a first region of the at least two regions is accessible only by the cellular modem processor, and a second region of the at least two regions is accessible by both the cellular modem processor and the second processor.

20. The integrated circuitry of claim 1 further comprising:

a hardware accelerator operably coupled to the cellular modem processor, wherein one or more modem operations are performed by the hardware accelerator.

21. The integrated circuitry of claim 1 wherein the at least one memory stores instructions for the cellular modem processor to perform all layer 1 processor operations and all layer 2 processor operations.

22. The integrated circuitry of claim 21 wherein the at least one memory stores instructions for the cellular modem processor to perform all level 3 processor operations.

23. (canceled)

24. A method of performing cellular modem processor operations comprising:

performing a layer 1 processor operation in accordance with a cellular communication protocol by a cellular modem processor;

performing a layer 2 processor operation in accordance with the cellular communication protocol by the cellular modem processor; and

performing a layer 3 processor operation in accordance with the cellular communication protocol by the cellular modem processor.

25. The method of claim 24 further comprising:

processing multimedia information by the cellular modem processor.

26. The method of claim 25 further comprising:

accessing by a second processor, the multimedia information processed by the cellular modem processor.

27. The method of claim 24 wherein all layer 1 processor operations and all layer 2 processor operations are performed by the cellular modem processor.

28. The method of claim 24 wherein all layer 3 processor operations are performed by the cellular modem processor.

29. The method of claim 24 wherein the modem processor operations are implemented by using instructions of one instruction set.

30. The method of claim 24 wherein all modem operations are implemented by the cellular modem processor executing instructions of an instruction set.

31. The method of claim 24 wherein the layer 1 processor operation is one of a modulation processor operation, a demodulation processor operation, an interleaving processor operation, a deinterleaving processor operation, a channel encoding processor operation, a channel decoding processor operation, a channel equalization processor operation, a synchronization processor operation, an automatic gain control processor operation, and an automatic frequency control processor operation.

32. The method of claim 24 further comprising:

performing a modulation processor operation by the cellular modem processor;

performing a demodulation processor operation by the cellular modem processor;

performing an interleaving processor operation by the cellular modem processor;

performing a deinterleaving processor operation by the cellular modem processor;

performing a channel encoding processor operation by the cellular modem processor;

performing a channel decoding processor operation by the cellular modem processor;

performing a channel equalization processor operation by the cellular modem processor;

performing a synchronization processor operation by the cellular modem processor;

performing an automatic gain control processor operation by the cellular modem processor; and

performing an automatic frequency control processor operation by the cellular modem processor.

33. The method of claim 24 wherein the layer 2 processor operation is one of a medium access control processor operation and a logical link control processor operation.

34. The method of claim 24 wherein the layer 3 processor operation is one of a call control (CC) management processor operation, a mobility management (MM) processor operation, a subnet convergence protocol (SNDCP) processor operation, and a radio resource (RR) management processor operation.

35. The method of claim 24 further comprising:

performing a call control (CC) management processor operation by the cellular modem processor;

performing a mobility management (MM) processor operation by the cellular modem processor;

performing a subnet convergence protocol (SNDCP) processor operation by the cellular modem processor, and performing a radio resource (RR) management processor operation by the cellular modem processor.

37. The method of claim 24 further comprising;

extracting data from a wireless signal, wherein the extracting includes;

performing a layer 1 processor operation in accordance with the cellular communications protocol by the cellular modem processor;

performing a layer 2 processor operation in accordance with the cellular communications protocol by the cellular modem processor; and

performing a layer 3 processor operation in accordance with the cellular communications protocol by the cellular modem processor;

storing the data in a shared memory;

accessing the data stored in the shared memory by a second processor.

38. The method of claim 24 further comprising;

storing data in a shared memory by a second processor;

accessing the data stored in the shared memory by the cellular modem processor;

inserting the data into a wireless signal, wherein the inserting includes;

performing a layer 1 processor operation in accordance with the cellular communications protocol by the cellular modem processor;

performing a layer 2 processor operation in accordance with the cellular communications protocol by the cellular modem processor; and

performing a layer 3 processor operation in accordance with the cellular communications protocol by the cellular modem processor.

39. The method of claim 24 wherein the layer 1 processor operation, the layer 2 processor operation, and the layer 3 processor operation are performed by the cellular modem processor executing instructions from one instruction set.

36. (canceled)

40. (canceled)

41. (canceled)

42. (canceled)

43. (canceled)

44. (canceled)

45. (canceled)

46. (canceled)

47. An integrated circuit for a cellular mobile station, the cellular mobile station communicating data as per a cellular communication protocol, the integrated circuit comprising:

a memory, the memory holding instructions when the integrated circuit is operational;

a cellular modem processor, the cellular modem processor to execute instructions including instructions in the memory, the cellular modem processor to execute instructions to perform a layer 1 processor operation of a cellular communication protocol, instructions to perform a layer 2 processor operation of the cellular communication protocol, and instructions to perform a layer 3 processor operation of the cellular communication protocol when the integrated circuit is operational.

48. The cellular mobile station of claim 47 wherein the cellular modem processor is characterized as a digital signal processor.

49. The integrated circuit of claim 47 wherein the cellular modem processor is characterized as a microcontroller unit processor.

50. The integrated circuit of claim 47 wherein the layer 1 processor operation is one of a modulation processor operation, a demodulation processor operation, an interleaving processor operation, a deinterleaving processor operation, a channel encoding processor operation, a channel decoding processor operation, a channel equalization processor operation, a synchronization processor operation, an automatic gain control processor operation, and an automatic frequency control processor operation.

51. The integrated circuit of claim 47 wherein the instructions to be executed by the cellular modem processor when the integrated circuit is operational include instructions for performing by the cellular modem processor, a modulation processor operation, a demodulation processor operation, an interleaving processor operation, a deinterleaving processor operation, a channel encoding processor operation, a channel decoding processor operation, a channel equalization processor operation, a synchronization processor operation, an automatic gain control processor operation, and an automatic frequency control processor operation.

52. The integrated circuit of claim 47 wherein the layer 2 processor operation is one of a medium access control processor operation and a logical link control processor operation.

53. The integrated circuit of claim 47 wherein the layer 3 processor operation is one of a call control (CC) management processor operation, a mobility management (MM) processor operation, a subnet convergence protocol (SNDCP) processor operation, and a radio resource (RR) management processor operation.

54. The integrated circuit of claim 47 wherein the instructions to be executed by the cellular modem processor when the integrated circuit is operational include instructions for performing by the cellular modem processor, a call control (CC) management processor operation, a mobility management (MM) processor operation, a subnet convergence protocol (SNDCP) processor operation, and a radio resource (RR) management processor operation.

55. The integrated circuit of claim 47 wherein the memory includes cache memory.

56. The integrated circuit of claim 47 wherein the memory includes a non volatile memory.

57. The integrated circuit of claim 47 wherein the cellular modem processor performs all layer 1 processor operations and all layer 2 processor operations when the integrated circuit is operational.

58. The integrated circuit of claim 57 wherein the cellular modem processor performs all level 3 processor operations when the integrated circuit is operational.

59. An integrated circuit for a cellular mobile station, the cellular mobile station communicating data as per a cellular communication protocol, the integrated circuit comprising:

a cellular modem processor, the cellular modem processor to execute instructions to perform a layer 1 processor operation of a cellular communication protocol, instructions to perform a layer 2 processor operation of the cellular communication protocol, and instructions to perform a layer 3 processor operation of the cellular communication protocol when the integrated circuit is operational; and

a second processor.

60. The integrated circuit of claim 59 wherein the layer 1 processor operation is one of a modulation processor operation, a demodulation processor operation, an interleaving processor operation, a deinterleaving processor operation, a channel encoding processor operation, a channel decoding processor operation, a channel equalization processor operation, a synchronization processor operation, an automatic gain control processor operation, and an automatic frequency control processor operation.

61. The integrated circuit of claim 59 wherein the instructions to be executed by the cellular modem processor when the integrated circuit is operational include instructions for performing by the cellular modem processor, a modulation processor operation, a demodulation processor operation, an interleaving processor operation, a deinterleaving processor operation, a channel encoding processor operation, a channel decoding processor operation, a channel equalization processor operation, a synchronization processor operation, an automatic gain control processor operation, and an automatic frequency control processor operation.

62. The integrated circuit of claim 59 wherein the layer 2 processor operation is one of a medium access control processor operation and a logical link control processor operation.

63. The integrated circuit of claim 59 wherein the layer 3 processor operation is one of a call control (CC) management processor operation, a mobility management (MM) processor operation, a subnet convergence protocol (SNDCP) processor operation, and a radio resource (RR) management processor operation.

64. The integrated circuit of claim 59 wherein the instructions to be executed by the cellular modem processor when the integrated circuit is operational include instructions for performing by the cellular modem processor, a call control (CC) management processor operation, a mobility management (MM) processor operation, a subnet convergence protocol (SNDCP) processor operation, and a radio resource (RR) management processor operation.

65. The integrated circuit of claim 59 wherein the second processor executes application instructions and does not perform modem processor operations.

66. The integrated circuit of claim 59 further comprising:

at least one shared memory accessible by both the cellular modem processor and the second processor.

67. The integrated circuit of claim 59 wherein the at least one shared memory is divided into at least two regions, a first region of the at least two regions is accessible only by the cellular modem processor, and a second region of the at least two regions is accessible by both the cellular modem processor and the second processor.

68. The integrated circuit of claim 59 wherein the cellular modem processor performs all layer 1 processor operations and all layer 2 processor operations when the integrated circuit is operational.

69. The integrated circuit of claim 68 wherein the cellular modem processor performs all level 3 processor operations when the integrated circuit is operational.