Chipset support for managing hardware interrupts in a virtual machine system

• US 20050080970A1
• Filed: 09/30/2003
• Published: 04/14/2005
• Est. Priority Date: 09/30/2003
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Anderson, Andrew V., Neiger, Gilbert, Bennett, Steven M., Uhlig, Richard, Jeyasingh, Stalinselvaraj, Kagi, Alain, Cota-Robles, Erik
• Granted Patent: US 7,177,967 B2
• Time in Patent Office: Days
• US Class Current: 710/266
• CPC Class Codes: G06F 13/24 using interrupt G06F13/32 takes precedence
• CPC Class Codes: G06F 9/45533 Hypervisors; Virtual machine monitors
• CPC Class Codes: G06F 9/4812 by interrupt, e.g. masked

Abstract

In one embodiment, an apparatus includes a set of multiplex blocks coupled with an interrupt controller and multiple interrupt request lines, and a virtual machine monitor block (VMM) coupled to the set of multiplex blocks. Each multiplex block corresponds to a distinct interrupt request line. Each multiplex block is to route the interrupt request signal received via the corresponding interrupt request line either to the interrupt controller or the VMM block depending on a current configuration value of this multiplex block.

Claims

1. A system comprising:

an interrupt controller;

one or more interrupt request lines;

one or more multiplex blocks coupled with the interrupt controller and the one or more interrupt request lines, each of the one or more multiplex blocks corresponding to a distinct one of the one or more interrupt request lines; and

a virtual machine monitor (VMM) block coupled to the one or more multiplex blocks and a processor,

wherein each of the one or more multiplex blocks is to route an interrupt request signal received via a corresponding interrupt request line either to the interrupt controller or the VMM block depending on a current configuration value of said each of the one or more multiplex blocks.

2. The system of claim 1 wherein the current configuration value of said each of the one or more multiplex blocks requires that the interrupt request signal be routed to the interrupt controller if a device generating the interrupt request signal is managed by a currently operating virtual machine (VM).

3. The system of claim 1 wherein the current configuration value of said each of the one or more multiplex blocks requires that the interrupt request signal be routed to the VMM block if a device generating the interrupt request signal is not managed by a currently operating virtual machine (VM).

4. The system of claim 1 wherein the VMM block comprises a mask register to store mask information pertaining to one or more interrupt request signals routed to the VMM block.

5. The system of claim 1 wherein the VMM block comprises a status register to store status of each interrupt request signal routed to the VMM block.

6. The system of claim 4 wherein the VMM block is to assert an internal signal if one of the one or more routed interrupt request signals is asserted and is not masked, and to send the internal signal to the processor to cause a transition of control to a VMM.

7. The system of claim 6 wherein the VMM block is further to combine the internal signal with an external signal generated by an external signal source prior to sending the internal signal to the processor.

8. The system of claim 7 wherein:

the external signal is a non-maskable interrupt (NMI) signal; and

the external signal source is a NMI source.

9. The system of claim 7 wherein the internal signal is combined with the external signal using an OR operator.

10. The system of claim 1 wherein the interrupt controller has a read and write access path to a plurality of registers of the interface controller.

11. The system of claim 1 wherein:

the one or more multiplex blocks are configurable by a virtual machine monitor (VMM).

12. The system of claim 4 wherein the mask register of the VMM block is configurable by a VMM.

13. A method comprising:

receiving, at a multiplex block, an interrupt request signal from a device via an interrupt request line coupled with the multiplex block; and

determining, based on a current configuration value of the multiplex block, whether the interrupt request signal is to be sent to an interrupt controller or a virtual machine monitor (VMM) block coupled to the multiplex block.

14. The method of claim 13 wherein:

the current configuration value of the multiplex block requires that the interrupt request signal be sent to the interrupt controller if the device is managed by a currently-operating virtual machine (VM); and

the current configuration value of the multiplex block requires that the interrupt request signal be sent to the VMM block if the device is not managed by the currently-operating VM.

15. The method of claim 13 further comprising determining whether the interrupt request signal sent to the VMM block is masked based on data stored in a mask register of the VMM block.

16. The method of claim 13 further comprising updating a corresponding indicator in a status register of the VMM block upon receiving the interrupt request signal at the VMM block.

17. The method of claim 13 further comprising:

determining that the interrupt request signal received at the VMM block is not masked;

asserting an internal signal;

combining the internal signal with an external signal generated by an external signal source; and

transmitting the combined signal to a processor.

18. The method of claim 17 wherein:

the external signal is a non-maskable interrupt (NMI) signal; and

the designated external signal source is a NMI source.

19. An apparatus comprising:

one or more multiplex blocks coupled with an interrupt controller and one or more interrupt request lines, each of the one or more multiplex blocks corresponding to a distinct one of the one or more interrupt request lines; and

a virtual machine monitor (VMM) block coupled to the one or more multiplex blocks,

wherein each of the one or more multiplex blocks is to route an interrupt request signal received via a corresponding interrupt request line either to the interrupt controller or the VMM block depending on a current configuration value of said each of the one or more multiplex blocks.

20. The apparatus of claim 19 wherein the current configuration value of said each of the one or more multiplex blocks requires that the interrupt request signal be routed to the interrupt controller if a device generating the interrupt request signal is managed by a currently operating virtual machine (VM).

21. The apparatus of claim 19 wherein the current configuration value of said each of the one or more multiplex blocks requires that the interrupt request signal be routed to the VMM block if a device generating the interrupt request signal is not managed by a currently operating virtual machine (VM).

22. A method comprising:

identifying one or more interrupt request lines that are coupled to one or more devices managed by a virtual machine (VM);

configuring one or more multiplex blocks to route interrupt request signals on the one or more interrupt request lines to an interrupt controller; and

generating a request to transfer control to the VM.

23. The method of claim 22 further comprising:

configuring one or more multiplex blocks to route interrupt request signals on interrupt request lines that are not managed by the VM to a virtual machine monitor (VMM) block;

configuring a mask register in the VMM block to cause blocking of interrupt request signals routed to the VMM block.

24. The method of claim 22 further comprising:

restoring a state saved during a previous operation of the VM in the interrupt controller.

25. A system comprising:

a processor; and

a memory, coupled to the processor, to store instructions, which when executed by the processor, cause the processor to identify one or more interrupt request lines that are coupled to one or more devices managed by a virtual machine (VM), configure one or more multiplex blocks to route interrupt request signals on the one or more interrupt request lines to an interrupt controller, and generate a request to transfer control to the VM.

26. The system of claim 25 wherein the instructions, when executed by the processor, cause the processor further to configure one or more multiplex blocks to route interrupt request signals that are not managed by the VM to a virtual machine monitor (VMM) block, and configure a mask register in the VMM block to cause masking of interrupt request signals routed to the VMM block.

27. The system of claim 25 wherein the instructions, when executed by the processor, cause the processor further to restore a state saved during a previous operation of the VM in the interrupt controller.

28. A machine-readable medium containing instructions which, when executed by a processing system, cause the processing system to perform a method, the method comprising:

identifying one or more interrupt request lines that are coupled to one or more devices managed by a virtual machine (VM);

configuring one or more multiplex blocks to route interrupt request signals on the one or more interrupt request lines to an interrupt controller; and

generating a request to transfer control to the VM.

29. The machine-readable medium of claim 28 wherein the method further comprises:

configuring one or more multiplex blocks to route interrupt request signals on interrupt request lines that are not managed by the VM to a virtual machine monitor (VMM) block; and

configuring a mask register in the VMM block to cause masking/unmasking of interrupt request signals routed to the VMM block.

30. The machine-readable medium of claim 28 wherein the method further comprises:

restoring a state saved during a previous operation of the VM in the interrupt controller.