Thin film transistor

• US 20050082530A1
• Filed: 10/08/2004
• Published: 04/21/2005
• Est. Priority Date: 10/16/2003
• Status: Active Grant

• Current Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Original Assignee: Samsung Display Company Limited (Samsung Electronics Co. Ltd.)
• Inventors: Choi, Byoung-Deog, Koo, Jae-Bon, Kim, Won-Sik, So, Myeong-Seob
• Granted Patent: US 8,704,305 B2
• Time in Patent Office: Days
• US Class Current: 257/66
• CPC Class Codes: H01L 29/78615 with a body contact

Abstract

A thin film transistor of the present invention comprises, an active layer formed on an insulating substrate and having a channel region and source/drain regions; a gate electrode formed corresponding to the channel region of the active region; a body contact region separately formed with the source/drain regions in the active layer; source/drain electrodes each connected to the source/drain regions; and a conductive wiring for connecting the body contact region and the gate electrode.

Claims

1. A thin film transistor comprising:

an active layer formed on an insulating substrate and having a channel region and source/drain regions;

a gate electrode arranged in the channel region of the active layer;

a body contact region separately formed with the source/drain regions on the active layer;

source/drain electrodes each connected to the source/drain regions; and

a conductive wiring for connecting the body contact region and the gate electrode.

2. The thin film transistor of claim 1, further comprising conductive wiring formed in a configuration selected from the group consisting of:

in a body with the gate electrode; and

in a separate island-type bridge pattern.

3. The thin film transistor of claim 2, wherein the conductive wiring is made of the same material as the gate electrode.

4. The thin film transistor of claim 2, wherein the conductive wiring is made of a different conductive material from the gate electrode.

5. The thin film transistor of claim 1, wherein the body contact region and the channel region are part of the same layer.

6. The thin film transistor of claim 2, wherein the conductive wiring has an island-type bridge pattern structure, the wiring comprising:

a contact wiring made of the same material as the gate electrode and connected to the body contact region; and

a connection wiring is made of a different material from the contact wiring and for connecting the contact wiring and the gate electrode.

7. The thin film transistor of claim 2, wherein the conductive wiring is made of the same material as the source/drain electrodes, and has an island-type bridge pattern structure.

8. The thin film transistor of claim 2, wherein the conductive wiring is made of a different material from the source/drain electrodes, and has an island-type bridge pattern structure.

9. The thin film transistor of claim 2, wherein the conductive wiring has a bridge pattern structure, the wiring comprising:

first and second contact wirings made of the same material as the source/drain electrodes and connected to the gate electrode and the body contact region; and

a connection wiring made of a different material from the first and second contact wirings and for connecting the first and second contact wirings.

10. The thin film transistor of claim 2, wherein the conductive wiring is a transparent conductive layer and has an island-type bridge pattern structure.

11. The thin film transistor of claim 2, wherein the conductive wiring has a bridge pattern structure, the wiring comprising:

first and second contact wirings made of a transparent conductive material and connected to the gate electrode and the body contact region; and

a connection wiring made of a different material from the first and second contact wirings and for connecting the first and second contact wirings.

12. The thin film transistor of claim 1, wherein the source/drain electrodes and the body contact region are impurity regions having a conductivity type opposite to each other, and the channel region is an intrinsic region.

13. A thin film transistor for a flat panel display, the thin film transistor comprising:

an active layer formed on an insulating substrate, and having a channel region and source/drain regions;

a gate electrode formed corresponding to the channel region of the active layer;

a body contact region separately formed with the source/drain regions in the active layer;

source/drain electrodes each connected to the source/drain regions; and

conductive wiring for connecting the body contact region and the gate electrode,

wherein the conductive wiring is formed in a configuration selected from the group consisting of;

in a body with the gate electrode; and

in a separate island-type bridge pattern, and

wherein the conductive wiring is made of the same material as at least one electrode of the gate electrode, the source/drain electrodes or the pixel electrode

14. A thin film transistor comprising:

an active layer formed on an insulating substrate and having a channel region and source/drain regions;

a first insulating layer formed on the substrate to cover the active layer;

a gate electrode formed corresponding to the channel region of the active layer;

a second insulating layer formed to cover the gate electrode;

a body contact layer separately formed with the source/drain regions on the active layer;

source/drain electrodes each connected to the source/drain regions;

a contact hole formed on the first insulating layer to expose a portion of the body contact region; and

a conductive wiring for connecting the body contact region and the gate electrode through the contact hole.

15. The thin film transistor of claim 14, wherein the conductive wiring is formed roughly coplanar with the gate electrode, and the gate electrode and the body contact region are electrically connected by the conductive wiring through the contact hole.

16. The thin film transistor of claim 14, wherein the conductive wiring extends from the gate electrode, and the gate electrode and the body contact region are electrically connected by the conductive wiring through the contact hole.

17. A thin film transistor comprising:

an active layer formed on an insulating substrate and having a channel region and source/drain regions;

a first insulating layer formed on the substrate to cover the active layer;

a gate electrode formed corresponding to the channel region of the active region;

a second insulating layer formed to cover the gate electrode;

a body contact region separately formed with the source/drain regions in the active layer;

source/drain electrodes each connected to the source/drain regions;

a first contact hole formed on at least the second insulating layer of the first and second insulating layers to expose a portion of the gate electrode;

a second contact hole formed on at least the first insulating layer of the first and second insulating layers to expose a portion of the body contact region; and

a conductive wiring connecting the body contact region and the gate electrode through at least the second contact hole of the first contact hole and the second contact hole.

18. The thin film transistor of claim 17, wherein when the conductive wiring is formed roughly coplanar with the gate electrode, the gate electrode and the body contact region is electrically connected by the wiring through only the second contact hole formed on the first insulating layer.

19. The thin film transistor of claim 17, wherein when the conductive wiring is formed roughly coplanar with the source/drain electrodes, the gate electrode and the body contact region is electrically connected by the wiring through the first contact hole formed on the second insulating layer and the second contact hole formed across the first and second insulating layers.

20. A thin film transistor for a flat panel display comprising at least a pixel electrode, the thin film transistor comprising:

an active layer formed on an insulating substrate and having a channel region and source/drain regions;

a first insulating layer formed on the substrate to cover the active layer;

a gate electrode formed corresponding to the channel region of the active layer;

a second insulating layer formed to cover the gate electrode;

a body contact region separately formed with the source/drain regions in the active layer;

source/drain electrodes each connected to the source/drain regions;

a third insulating layer formed below the pixel electrode;

a first contact hole formed at least on the second insulating layer of the first to third insulating layers to expose a portion of the gate electrode;

a second contact hole formed at least on the first insulating layer of the first to third insulating layers to expose a portion of the body contact region; and

a conductive wiring for connecting the body contact region and the gate electrode through at least the second contact hole of the first contact hole and the second contact hole.

21. The thin film transistor of claim 20, wherein when the conductive wiring is formed roughly coplanar with the gate electrode, the gate electrode and the body contact region are electrically connected by the wiring through only the second contact hole formed on the first insulating layer.

22. The thin film transistor of claim 20, wherein when the conductive wiring is formed roughly coplanar with the source/drain electrodes, the gate electrode and the body contact region are electrically connected by the wiring through the first contact hole formed on the second insulating layer and the second contact hole formed across the first and second insulating layers.

23. The thin film transistor of claim 20, wherein when the conductive wiring is formed roughly coplanar with the pixel electrode, the gate electrode and the body contact region are electrically connected by the wiring through the first contact hole formed across the first and second insulating layers and the second contact hole formed across the first to third insulating layers.