Single poly CMOS imager
2 Assignments
0 Petitions
Accused Products
Abstract
More complete charge transfer is achieved in a CMOS or CCD imager by reducing the spacing in the gaps between gates in each pixel cell, and/or by providing a lightly doped region between adjacent gates in each pixel cell, and particularly at least between the charge collecting gate and the gate downstream to the charge collecting gate. To reduce the gaps between gates, an insulator cap with spacers on its sidewalls is formed for each gate over a conductive layer. The gates are then etched from the conductive layer using the insulator caps and spacers as hard masks, enabling the gates to be formed significantly closer together than previously possible, which, in turn increases charge transfer efficiency. By providing a lightly doped region on between adjacent gates, a more complete charge transfer is effected from the charge collecting gate.
-
Citations
44 Claims
-
1-10. -10. (canceled)
-
11. A semiconductor device comprising:
-
a substrate; and
at least two non-overlapping gate structures formed in a single layer on said substrate, said gate structures being spaced apart by a gap measuring less than 1300 Angstroms. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25)
-
-
26. A semiconductor device comprising:
-
a substrate;
a plurality of non-overlapping conductive gates formed over the substrate; and
a lightly doped region in the substrate between two adjacent ones of the plurality of conductive gates, the two adjacent ones of the plurality of conductive gates being formed in a single layer and separated by a gap of less than 1300 Angstroms. - View Dependent Claims (27, 28, 29, 30, 31, 32, 33)
-
-
34. An image processing apparatus comprising:
-
an image sensor for detecting an image and outputting image signals corresponding to the detected image; and
an image processor for processing the image signals outputted from the image sensor, wherein the image sensor comprises;
a substrate; and
at least two non-overlapping gate structures formed in a single layer on said substrate, said gate structures being spaced apart by a gap measuring less than 1300 Angstroms. - View Dependent Claims (35, 36, 37, 38)
-
-
39. An image processing apparatus comprising:
-
an image sensor for detecting an image and outputting image signals corresponding to the detected image; and
an image processor for processing the image signals outputted from the image sensor, wherein the image sensor comprises;
a substrate;
a plurality of conductive gates formed over the substrate; and
a lightly doped region in the substrate between at least one pair of adjacent non-overlapping conductive gates formed in a single layer and separated by a gap of less than 1300 micrometers.
-
-
40. A processing system, comprising:
-
a processor for receiving and processing image data; and
an image data generator for supplying image data to the processor, the image data generator comprising an image sensor for obtaining an image and outputting an image signal, an image processor for processing the image signal, and a controller for controlling the image sensor and the image processor, wherein the image sensor comprises;
a substrate, and at least two non-overlapping gate structures formed in a single layer on said substrate, said gate structures being spaced apart by a gap measuring less than 1300 Angstroms. - View Dependent Claims (41, 42, 43)
-
-
44. A processing system, comprising:
-
a processor for receiving and processing image data; and
an image data generator for supplying image data to the processor, the image data generator comprising an image sensor for obtaining an image and outputting an image signal, an image processor for processing the image signal, and a controller for controlling the image sensor and the image processor, wherein the image sensor comprises;
a substrate;
a plurality of non-overlapping conductive gates formed over the substrate; and
a lightly doped region in the substrate between two adjacent ones of the plurality of conductive gates, the adjacent conductive gates being formed in a single layer and separated by a gap of less than 1300 Angstroms.
-
Specification