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Low capacitance ESD protection device, and integrated circuit including the same

  • US 20050082618A1
  • Filed: 08/30/2004
  • Published: 04/21/2005
  • Est. Priority Date: 11/07/2002
  • Status: Active Grant
First Claim
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1. A low capacitance ESD protection device comprising:

  • a substrate;

    a well of a first conductivity type in the substrate;

    a first and second transistor of the first conductivity type respectively on two sides of the well;

    a guard ring of a second conductivity type in the substrate, surrounding the well, and the first and second transistor; and

    a doped region of the second conductivity type in the well;

    wherein profiles of a drain and source region of each of the first and second transistor are un-symmetrical, and an area of the drain region is smaller than that of the source region in each of the first and second transistor.

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