Flexible converter interface for use in analog-to-digital and digital-to-analog systems

• US 20050083222A1
• Filed: 12/21/2004
• Published: 04/21/2005
• Est. Priority Date: 08/16/2004
• Status: Active Grant

• Current Assignee: National Instruments Corporation (Emerson Electric Company)
• Original Assignee: National Instruments Corporation (Emerson Electric Company)
• Inventors: Castro, Rafael, Nickel, Sean M.
• Granted Patent: US 7,369,078 B2
• Time in Patent Office: Days
• US Class Current: 341/155
• CPC Class Codes: G06F 3/05 Digital input using the sampling of an analogue quantity at regular intervals of time , input from a/d converter or output to d/a converter

Abstract

A flexible converter interface for interfacing with ADCs or DACs. The flexible converter interface may be comprised in a data acquisition device and may be a programmable ADC interface or a programmable DAC interface. The flexible converter interface may be programmed with a converter type parameter, a converter resolution parameter, and a converter data type parameter, among others, to interface with various types of ADCs or DACs and to allow for future expandability. The flexible converter interface may function as either a programmable parallel converter interface or a programmable serial converter interface depending upon the programmed converter type parameter. Additionally, functions associated with I/O pins corresponding to the flexible converter interface may vary depending upon the programmed converter resolution parameter and the programmed converter type parameter. Furthermore, the flexible converter interface may perform a data conversion operation on ADC or DAC data depending upon the programmed converter data type parameter.

Claims

1. An integrated circuit for use in a measurement device, the integrated circuit comprising:

a programmable converter interface operable to be programmed with a plurality of parameters, wherein one of the plurality of parameters is a converter type parameter;

wherein the programmable converter interface is operable to function as a programmable parallel converter interface or a programmable serial converter interface depending upon a programmed converter type parameter.

2. The integrated circuit of claim 1, wherein the programmable converter interface is operable to function as a programmable parallel converter interface when the programmed converter type parameter indicates a parallel mode of operation, and the programmable converter interface is operable to function as a programmable serial converter interface when the programmed converter type parameter indicates a serial mode of operation.

3. The integrated circuit of claim 2, wherein the programmable converter interface is a programmable analog-to-digital converter (ADC) interface, wherein the programmable converter interface is operable to be programmed with an ADC resolution parameter and an ADC data type parameter.

4. The integrated circuit of claim 3, wherein the programmable converter interface further comprises one or more input/output (I/O) pins, wherein the one or more I/O pins are operable to receive ADC data.

5. The integrated circuit of claim 4, wherein functions associated with a portion of the I/O pins vary depending upon a programmed ADC resolution parameter and the programmed converter type parameter.

6. The integrated circuit of claim 5, wherein if, based on the programmed ADC resolution parameter and the programmed converter type parameter, a portion of the I/O pins are required for communication and the portion is less than a maximum value, the portion of the I/O pins are configured as ADC data input pins and a remaining portion of the I/O pins are configured to perform other functions.

7. The integrated circuit of claim 3, further comprising an analog input buffer coupled to the programmable converter interface, wherein the analog input buffer is operable to store ADC data received via one or more I/O pins, wherein a configuration of the analog input buffer is dependent upon a programmed ADC resolution parameter.

8. The integrated circuit of claim 3, wherein a programmed ADC data type parameter is operable to indicate whether the programmable converter interface will receive ADC data in straight binary or two'"'"'s complement form.

9. The integrated circuit of claim 8, wherein the programmable converter interface is operable to perform a data conversion operation on received ADC data depending upon a programmed ADC data type parameter and a received data type signal.

10. The integrated circuit of claim 2, wherein the programmable converter interface is a programmable digital-to-analog converter (DAC) interface, wherein the programmable converter interface is operable to be programmed with a DAC resolution parameter and a DAC data type parameter.

11. The integrated circuit of claim 10, wherein the programmable converter interface further comprises one or more input/output (I/O) pins, wherein the one or more I/O pins are operable to transmit DAC data.

12. The integrated circuit of claim 11, wherein functions associated with a portion of the I/O pins vary depending upon a programmed DAC resolution parameter and the programmed converter type parameter.

13. The integrated circuit of claim 12, wherein if, based on the programmed DAC resolution parameter and the programmed converter type parameter, a portion of the I/O pins are required for communication and the portion is less than a maximum value, the portion of the I/O pins are configured as DAC data output pins and a remaining portion of the I/O pins are configured to perform other functions.

14. The integrated circuit of claim 10, further comprising an analog output buffer coupled to the programmable converter interface, wherein the analog output buffer is operable to store DAC data to be transmitted via one or more I/O pins, wherein the configuration of the analog output buffer is dependent upon a programmed DAC resolution parameter.

15. The integrated circuit of claim 10, wherein a programmed DAC data type parameter is operable to indicate whether the programmable converter interface is configured to transmit DAC data in straight binary or two'"'"'s complement form via one or more I/O pins.

16. The integrated circuit of claim 15, wherein the programmable converter interface is operable to perform a data conversion operation on the DAC data to be transmitted via the one or more I/O pins depending upon a programmed DAC data type parameter.

17. The integrated circuit of claim 2, comprising both a programmable ADC interface and a programmable DAC interface, wherein each of the programmable ADC interface and the programmable DAC interface is operable to function as a programmable parallel converter interface or a programmable serial converter interface depending upon a programmed state of a corresponding converter type parameter.

18. A data acquisition device, comprising:

a programmable ADC interface comprising one or more input/output (I/O) pins, wherein the one or more I/O pins are operable to receive ADC data;

wherein the programmable ADC interface is operable to be programmed with an ADC resolution parameter and an ADC type parameter;

wherein functions associated with a portion of the I/O pins vary depending upon a programmed ADC resolution parameter and a programmed ADC type parameter.

19. The data acquisition device of claim 18, wherein if, based on the programmed ADC resolution parameter and the programmed ADC type parameter, a portion of the I/O pins are required for communication and the portion is less than a maximum value, the portion of the I/O pins are configured as ADC data input pins and a remaining portion of the I/O pins are configured to perform other functions.

20. The data acquisition device of claim 18, wherein the programmable ADC interface is operable to be programmed with an ADC type parameter, wherein the programmable ADC interface is operable to function as a programmable parallel ADC interface or a programmable serial ADC interface depending upon a programmed ADC type parameter.

21. The data acquisition device of claim 18, further comprising an analog input buffer coupled to the programmable ADC interface, wherein the analog input buffer is operable to store ADC data, wherein a configuration of the analog input buffer is dependent upon the programmed ADC resolution parameter.

22. The data acquisition device of claim 21, wherein a depth and a width of the analog input buffer is dependent upon the programmed ADC resolution parameter.

23. The data acquisition device of claim 18, further comprising:

a programmable DAC interface comprising one or more I/O pins, wherein the one or more I/O pins are operable to transmit DAC data;

wherein the programmable DAC interface is operable to be programmed with a DAC resolution parameter and a DAC type parameter;

wherein functions associated with a portion of the I/O pins vary depending upon a programmed DAC resolution parameter and a programmed DAC type parameter.

24. The data acquisition device of claim 23, wherein if, based on the programmed DAC resolution parameter and the programmed DAC type parameter, a portion of the I/O pins are required for communication and the portion is less than a maximum value, the portion of the I/O pins are configured as DAC data output pins and a remaining portion of the I/O pins are configured to perform other functions.

25. The data acquisition device of claim 23, wherein the programmable DAC interface is operable to be programmed with a DAC type parameter, wherein the programmable DAC interface is operable to function as a programmable parallel DAC interface or a programmable serial DAC interface depending upon a programmed DAC type parameter.

26. The data acquisition device of claim 23, further comprising an analog output buffer coupled to the programmable DAC interface, wherein the analog output buffer is operable to store DAC data, wherein a configuration of the analog output buffer is dependent upon the programmed DAC resolution parameter.

27. The data acquisition device of claim 26, wherein a depth and a width of the analog output buffer is dependent upon the programmed DAC resolution parameter.

28. A data acquisition device, comprising:

a programmable ADC interface operable to be programmed with an ADC data type parameter and operable to receive a data type signal, wherein a programmed ADC data type parameter indicates whether the programmable ADC interface will receive ADC data in straight binary or two'"'"'s complement form, wherein the data type signal indicates whether the data acquisition device received a unipolar analog signal or a bipolar analog signal;

wherein the programmable ADC interface is operable to perform a data conversion operation on the received ADC data depending upon the programmed ADC data type parameter and the received data type signal.

29. The data acquisition device of claim 28, wherein the programmable ADC interface comprises a data conversion and extension unit operable to perform a data conversion operation on the received ADC data depending upon the programmed ADC data type parameter and the received data type signal, and the data conversion and extension unit is also operable to perform an extension operation on the received ADC data depending upon a programmed ADC resolution parameter.

30. The data acquisition device of claim 29, wherein the data conversion and extension unit comprises a first logic circuit operable to select a most significant bit (MSB) of the received ADC data depending upon the programmed ADC resolution parameter to perform a data conversion operation on the received ADC data depending upon the programmed ADC data type parameter and the received data type signal.

31. The data acquisition device of claim 30, wherein the first logic circuit of the data conversion and extension unit is operable to invert the selected MSB of the received ADC data if:

the received data type signal indicates that the data acquisition device received a unipolar analog signal and the programmed ADC data type parameter indicates that the programmable ADC interface will receive ADC data in two'"'"'s complement form, to convert the received ADC data from two'"'"'s complement to straight binary form, or

the received data type signal indicates that the data acquisition device received a bipolar analog signal and the programmed ADC data type parameter indicates that the programmable ADC interface will receive ADC data in straight binary form, to convert the received ADC data from straight binary to two'"'"'s complement form.

32. The data acquisition device of claim 30, wherein the first logic circuit of the data conversion and extension unit is operable to maintain the selected MSB of the received ADC data if:

the received data type signal indicates that the data acquisition device received a unipolar analog signal and the programmed ADC data type parameter indicates that the programmable ADC interface will receive ADC data in straight binary form, to maintain the format of the received ADC data, or

the received data type signal indicates that the data acquisition device received a bipolar analog signal and the programmed ADC data type parameter indicates that the programmable ADC interface will receive ADC data in two'"'"'s complement form, to maintain the format of the received ADC data.

33. The data acquisition device of claim 30, wherein the data conversion and extension unit comprises a second logic circuit operable to perform an extension operation on the received ADC data depending upon whether the programmed ADC resolution parameter is equal to one or more predetermined values.

34. The data acquisition device of claim 33, wherein if the programmed ADC resolution parameter is not equal to the one or more predetermined values, the second logic circuit is operable to perform an extension operation by adding extra bits to the received ADC data.

35. The data acquisition device of claim 34, wherein the second logic circuit is operable to add a particular number of extra bits so that the number of bits associated with the ADC data equals one of the predetermined values.

36. The data acquisition device of claim 34, wherein the data conversion and extension unit is operable to receive the data type signal, wherein if the received data type signal indicates that the data acquisition device received a bipolar analog signal, each of the added extra bits comprises a logic value associated with an inverted or uninverted MSB of the received ADC data to sign extend the received ADC data.

37. The data acquisition device of claim 36, wherein if the received data type signal indicates that the data acquisition device received a unipolar analog signal, each of the added extra bits comprises a logic low value to non-sign extend the received ADC data.

38. The data acquisition device of claim 28, further comprising:

a programmable DAC interface operable to be programmed with a DAC data type parameter, wherein a programmed DAC data type parameter indicates whether one or more digital-to-analog converters (DACs) coupled to the programmable DAC interface are configured to receive DAC data in straight binary or two'"'"'s complement form;

wherein the programmable DAC interface is operable to perform a data conversion operation on the DAC data to be transmitted depending upon a programmed DAC data type parameter.

39. The data acquisition device of claim 38, wherein the programmable DAC interface comprises a data conversion unit, wherein the data conversion unit comprises a logic circuit operable to select a most significant bit (MSB) of the DAC data to be transmitted depending upon a programmed DAC resolution parameter, to perform a data conversion operation on the DAC data to be transmitted depending upon the programmed DAC data type parameter.

40. The data acquisition device of claim 39, wherein the logic circuit of the data conversion unit is operable to invert the selected MSB if:

the DAC data to be transmitted is in straight binary form and the programmed DAC data type parameter indicates that corresponding one or more DACs coupled to the programmable DAC interface are configured to receive the DAC data in two'"'"'s complement form, or

the DAC data to be transmitted is in two'"'"'s complement form and the programmed DAC data type parameter indicates that the corresponding one or more DACs coupled to the programmable DAC interface are configured to receive the DAC data in straight binary form.

41. A data acquisition device, comprising:

one or more analog-to-digital converters (ADCs) operable to convert received analog data into digital ADC data in either straight binary or two'"'"'s complement form;

one or more digital-to-analog converters (DACS) operable to convert received digital DAC data in either straight binary or two'"'"'s complement form into analog data;

an integrated circuit coupled to the one or more ADCs and the one or more DACs, the integrated circuit comprising;

a programmable ADC interface operable to receive the digital ADC data from the one or more ADCs,

wherein the programmable ADC interface is also operable to be programmed with a plurality of parameters, wherein one of the plurality of parameters is an ADC type parameter,

wherein the programmable ADC interface is operable to function as a programmable parallel ADC interface or a programmable serial ADC interface depending upon a programmed ADC type parameter, and

a programmable DAC interface operable to transmit the digital DAC data to the one or more DACs,

wherein the programmable DAC interface is also operable to be programmed with a plurality of parameters, wherein one of the plurality of parameters is a DAC type parameter,

wherein the programmable DAC interface is operable to function as a programmable parallel DAC interface or a programmable serial DAC interface depending upon a programmed DAC type parameter.

42. The data acquisition device of claim 41, wherein:

the programmable ADC interface is operable to function as a programmable parallel ADC interface when the programmed ADC type parameter indicates a parallel mode of operation, and the programmable ADC interface is operable to function as a programmable serial ADC interface when the programmed ADC type parameter indicates a serial mode of operation; and

the programmable DAC interface is operable to function as a programmable parallel DAC interface when the programmed DAC type parameter indicates a parallel mode of operation, and the programmable DAC interface is operable to function as a programmable serial DAC interface when the programmed DAC type parameter indicates a serial mode of operation.

43. The data acquisition device of claim 41, wherein:

the programmable ADC interface is operable to be programmed with an ADC resolution parameter and an ADC data type parameter; and

the programmable DAC interface is operable to be programmed with a DAC resolution parameter and a DAC data type parameter.

44. The data acquisition device of claim 43, wherein the programmable ADC interface comprises one or more input/output (I/O) pins, wherein the one or more I/O pins are operable to receive the ADC data, wherein functions associated with a portion of the I/O pins vary depending upon a programmed ADC resolution parameter and the programmed ADC type parameter, and wherein if, based on the programmed ADC resolution parameter and the programmed ADC type parameter, a portion of the I/O pins are required for communication and the portion is less than a maximum value, the portion of the I/O pins are configured as ADC data input pins and a remaining portion of the I/O pins are configured to perform other functions.

45. The data acquisition device of claim 43, wherein the programmable DAC interface comprises one or more input/output (I/O) pins, wherein the one or more I/O pins are operable to transmit the DAC data, wherein functions associated with a portion of the I/O pins vary depending upon a programmed DAC resolution parameter and the programmed DAC type parameter, and wherein if, based on the programmed DAC resolution parameter and the programmed DAC type parameter, a portion of the I/O pins are required for communication and the portion is less than a maximum value, the portion of the I/O pins are configured as DAC data output pins and a remaining portion of the I/O pins are configured to perform other functions.

46. The data acquisition device of claim 43, wherein the integrated circuit further comprises:

an analog input buffer coupled to the programmable ADC interface, wherein the analog input buffer is operable to store the ADC data, wherein a depth and a width of the analog input buffer is dependent upon the programmed ADC resolution parameter; and

an analog output buffer coupled to the programmable DAC interface, wherein the analog output buffer is operable to store the DAC data, wherein a depth and a width of the analog output buffer is dependent upon the programmed DAC resolution parameter.

47. The data acquisition device of claim 43, wherein the programmable ADC interface is operable to receive a data type signal, wherein the data type signal indicates whether the data acquisition device received a unipolar analog signal or a bipolar analog signal, wherein a programmed ADC data type parameter indicates whether the programmable ADC interface will receive ADC data from the one or more ADCs in straight binary or two'"'"'s complement form, wherein the programmable ADC interface is operable to perform a data conversion operation on the received ADC data depending upon the programmed ADC data type parameter and the received data type signal.

48. The data acquisition device of claim 47, wherein the programmable ADC interface comprises a data conversion and extension unit operable to perform a data conversion operation on the received ADC data depending upon the programmed ADC data type parameter and the received data type signal, and the data conversion and extension unit is also operable to perform an extension operation on the received ADC data depending upon a programmed ADC resolution parameter.

49. The data acquisition device of claim 43, wherein a programmed DAC data type parameter indicates whether the one or more DACs are configured to receive DAC data in straight binary or two'"'"'s complement form, wherein the programmable DAC interface is operable to perform a data conversion operation on the DAC data to be transmitted to the one or more DACs depending upon the programmed DAC data type parameter.

50. The data acquisition device of claim 41, wherein the integrated circuit is configured to operate in a bypass mode of operation when logic external to the integrated circuit is operable to perform write operations to the one or more DACs, wherein during the bypass mode of operation the integrated circuit is operable to transmit timing and control signals to the external logic to perform the write operations.

51. The data acquisition device of claim 50, wherein the integrated circuit further comprises an external shift in progress unit, wherein the external shift in progress unit is enabled when the integrated circuit is configured to operate in the bypass mode of operation, wherein during the bypass mode of operation the external shift in progress unit of the integrated circuit is operable to assert a hold off signal when a write operation to the one or more DACs is in progress to hold off new write operations.

52. The data acquisition device of claim 41, further comprising an analog output buffer located external to the integrated circuit, wherein during an external buffer mode of operation, the integrated circuit is operable to transmit timing and control signals to the external analog output buffer to perform update and write operations to the one or more DACs.

53. The data acquisition device of claim 41, comprised in a data acquisition system comprising a computer system for processing data obtained from one or more data acquisition processes.

54. The data acquisition device of claim 53, comprised in a data acquisition system further comprising a unit under test (UUT), wherein the UUT comprises a sensor operable to provide the data acquisition device with sensor data.

55. A method for configuring a data acquisition device, the method comprising:

programming a programmable ADC interface with an ADC type parameter, the programmable ADC interface functioning as a programmable parallel ADC interface or as a programmable serial ADC interface depending upon a programmed ADC type parameter;

the programmable ADC interface functioning as a programmable parallel ADC interface if the programmed ADC type parameter indicates a parallel mode of operation; and

the programmable ADC interface functioning as a programmable serial ADC interface if the programmed ADC type parameter indicates a serial mode of operation.

56. The method of claim 55, further comprising programming the programmable ADC interface with an ADC resolution parameter.

57. The method of claim 56, wherein the programmable ADC interface comprises one or more input/output (I/O) pins, and wherein if, based on a programmed ADC resolution parameter and the programmed ADC type parameter, a portion of the I/O pins are required for communication and the portion is less than a maximum value, the method further comprises configuring the portion of the I/O pins as ADC data input pins and configuring a remaining portion of the I/O pins to perform other functions.

58. The method of claim 56, wherein an analog input buffer is coupled to the programmable ADC interface, the method further comprises changing a depth and a width of the analog input buffer based on a programmed ADC resolution parameter.

59. The method of claim 55, further comprising:

programming the programmable ADC interface with an ADC data type parameter, wherein a programmed ADC data type parameter indicates whether the programmable ADC interface will receive ADC data in straight binary or two'"'"'s complement form;

the programmable ADC interface receiving a data type signal, wherein the data type signal indicates whether the data acquisition device received a unipolar analog signal or a bipolar analog signal; and

the programmable ADC interface performing a data conversion operation on the received ADC data depending upon the programmed ADC data type parameter and the received data type signal.

60. A method for configuring a data acquisition device, the method comprising:

programming a programmable DAC interface with an DAC type parameter, the programmable DAC interface functioning as a programmable parallel DAC interface or a programmable serial DAC interface depending upon a programmed DAC type parameter;

the programmable DAC interface functioning as a programmable parallel DAC interface if the programmed DAC type parameter indicates a parallel mode of operation; and

the programmable DAC interface functioning as a programmable serial DAC interface if the programmed DAC type parameter indicates a serial mode of operation.

61. The method of claim 60, further comprising programming the programmable DAC interface with a DAC resolution parameter.

62. The method of claim 61, wherein the programmable DAC interface comprises one or more input/output (I/O) pins, wherein if, based on a programmed DAC resolution parameter and the programmed DAC type parameter, a portion of the I/O pins are required for communication and the portion is less than a maximum value, the method further comprises configuring the portion of the I/O pins as DAC data output pins and configuring a remaining portion of the I/O pins to perform other functions.

63. The method of claim 61, wherein an analog output buffer is coupled to the programmable DAC interface, the method further comprising changing a depth and a width of the analog output buffer based on a programmed DAC resolution parameter.

64. The method of claim 60, further comprising:

programming the programmable DAC interface with a DAC data type parameter, wherein a programmed DAC data type parameter indicates whether one or more DACs coupled to the programmable DAC interface are configured to receive DAC data in straight binary or two'"'"'s complement form,

the programmable DAC interface performing a data conversion operation on the DAC data to be transmitted depending upon the programmed DAC data type parameter.