Automotive computing systems

• US 20050085955A1
• Filed: 10/27/2004
• Published: 04/21/2005
• Est. Priority Date: 12/20/2000
• Status: Active Grant

• Current Assignee: Microsoft Technology Licensing LLC (Microsoft Corporation)
• Original Assignee: Richard Dennis Beckert, Ronald Otto Radko, Sharon Drasnin
• Inventors: Drasnin, Sharon, Radko, Ronald Otto, Beckert, Richard Dennis
• Granted Patent: US 6,957,314 B2
• Time in Patent Office: Days
• US Class Current: 701/1
• CPC Class Codes: G06F 11/1441 Resetting or repowering
• CPC Class Codes: G06F 11/2015 Redundant power supplies power supply failure G06F1/30
• CPC Class Codes: G06F 12/08 in hierarchically structured memory systems, e.g. virtual memory systems
• CPC Class Codes: G06F 12/1009 using page tables, e.g. page table structures
• CPC Class Codes: G06F 12/1027 using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
• CPC Class Codes: G06F 12/122 of the least frequently used [LFU] type, e.g. with individual count value
• CPC Class Codes: G06F 2212/2022 Flash memory

Abstract

Automotive computing devices are described. In one embodiment, the system comprises means for maintaining a translation look-aside buffer that contains entries for recently translated virtual page addresses; means for maintaining a page table in device memory that contains a map for every valid virtual page address; and means for maintaining an object store page table in device SRAM that contains information associated with locations for every object store page.

Claims

1. An automotive computing system comprising:

means for maintaining a translation look-aside buffer that contains entries for recently translated virtual page addresses;

means for maintaining a page table in device memory that contains a map for every valid virtual page address; and

means for maintaining an object store page table in device SRAM that contains information associated with locations for every object store page.

2. The system of claim 1 further comprising means for updating the object store page table in the SRAM responsive to paging an object store page within the device.

3. The system of claim 1 further comprising means for battery-backing the SRAM in an event of a power loss.

4. The system of claim 1 further comprising means for paging object store pages from non-volatile memory to volatile memory responsive to accessing the pages in the non-volatile memory.

5. The system of claim 1 further comprising means for paging object store pages from DRAM to SRAM or to a separate DRAM buffer, in the event of a write access.

6. The system of claim 1 further comprising means for maintaining dirty object store pages in SRAM in the event of a power failure.

7. The system of claim 1 further comprising means for writing contents of a device DRAM to a device flash memory in a predetermined amount of time in the event of a power loss.

8. The system of claim 1 further comprising means for copying one or more dirty object store pages from SRAM to a device flash memory to make room in the SRAM for additional dirty object store pages.

9. The system of claim 1 further comprising means for copying one or more dirty object store pages from a device DRAM to a device flash memory to make room in the DRAM for additional dirty object store pages.

10. An automotive computing comprising:

means for maintaining multiple object store pages in device SRAM;

means for determining when to flush pages as a function of how many free SRAM pages are available;

means for periodically flushing one or more object store pages to device non-volatile memory to make room for additional object store pages; and

means for assigning multiple threads with different priorities to flush pages in accordance with their priorities.

11. The system of claim 10 further comprising means for battery-backing the SRAM in the event of a power loss.

12. The system of claim 10 further comprising means for battery-backing the SRAM in the event that a voltage, associated with operation of a vehicle that embodies the computing device, drops out of regulation.

13. The system of claim 10 further comprising means for tracking the frequency of object store page writes, and means for flushing object store pages that are least frequently written to, before object store pages that are more frequently written to.

14. The system of claim 10, wherein said means for assigning comprises means for assigning threads with low, medium, and high priorities.

15. An automotive computing system comprising:

means for providing device SRAM that is configured to be backed by a battery in an event of a power loss;

means for maintaining a translation look-aside buffer that contains entries for recently translated virtual page addresses;

means for maintaining a page table in device memory that contains a map for every valid virtual page address;

means for maintaining an object store page table in the device SRAM that contains information associated with locations for every object store page;

means for updating the object store page table in the SRAM responsive to paging an object store page within the device; and

means for battery-backing the SRAM in an event of a power loss.

16. The system of claim 15 further comprising means for paging object store pages from non-volatile memory to volatile memory responsive to accessing the pages in the non-volatile memory.

17. The system of claim 15 further comprising means for paging object store pages from DRAM to SRAM or to a separate DRAM buffer, in the event of a write access.

18. The system of claim 15 further comprising means for maintaining dirty object store pages in SRAM in the event of a power failure.

19. The system of claim 15 further comprising means for writing contents of a device DRAM to a device flash memory in a predetermined amount of time in the event of a power loss.

20. The system of claim 15 further comprising means for copying one or more dirty object store pages from SRAM to a device flash memory to make room in the SRAM for additional dirty object store pages.

21. The system of claim 15 further comprising means for copying one or more dirty object store pages from a device DRAM to a device flash memory to make room in the DRAM for additional dirty object store pages.