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Logic device having vertically extending metal-insulator-metal capacitor between interconnect layers and method of fabricating the same

  • US 20050087879A1
  • Filed: 10/20/2004
  • Published: 04/28/2005
  • Est. Priority Date: 10/28/2003
  • Status: Active Grant
First Claim
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1. A logic device comprising:

  • a lower interconnect layer located over a semiconductor substrate;

    an upper interconnect layer located over the lower interconnect layer;

    a U-shaped lower metal plate interposed between the lower interconnect layer and the upper interconnect layer, and being in contact with the lower interconnect layer;

    a capacitor dielectric layer covering the inner surface of the lower metal plate, and having an extension portion interposed between the brim of the lower metal plate and the upper interconnect layer; and

    an upper metal plate covering the inner surface of the capacitor dielectric layer, contacting the upper interconnect layer, and being confined by the capacitor dielectric layer.

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