PHOTODIODE SENSOR AND PIXEL SENSOR CELL FOR USE IN AN IMAGING DEVICE
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Abstract
A multiple-trench photosensor for use in a CMOS imager having an improved charge capacity. The multi-trench photosensor may be either a photogate or photodiode structure. The multi-trench photosensor provides the photosensitive element with an increased surface area compared to a flat photosensor occupying a comparable area on a substrate. The multi-trench photosensor also exhibits a higher charge capacity, improved dynamic range, and a better signal-to-noise ratio. Also disclosed are processes for forming the multi-trench photosensor.
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Citations
90 Claims
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1-44. -44. (canceled)
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45. A photodiode sensor for use in an imaging device, said photodiode sensor comprising:
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a doped layer of a first conductivity type formed in a substrate;
a plurality of trenches formed in said doped layer, each of said plurality of trenches having a plurality of sidewalls and a bottom, each of said plurality of trenches having a depth within the range of approximately 0.05 to 10 μ
m; and
a doped region of a second conductivity type formed at the sidewalls and bottom of each of said plurality of trenches. - View Dependent Claims (46, 47, 48, 49, 50, 51)
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52-73. -73. (canceled)
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74. A pixel sensor cell for use in an imaging device, said pixel sensor cell comprising:
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a doped layer of a first conductivity type formed in a substrate;
a plurality of trenches formed in said doped layer, each of said plurality of trenches having a plurality of sidewalls and a bottom;
a photogate formed in each of said plurality of trenches, wherein said photogate comprises a first doped region of a second conductivity type formed at the sidewalls and bottom of each of said plurality of trenches, a conductive layer formed on substantially all of an upper surface of said first doped region for gating the collection of charges in said first doped region, and an insulating layer formed between said first doped region and said conductive layer;
a second doped region of a second conductivity type formed in said doped layer and positioned to receive charges from said first doped region of each of said plurality of trenches; and
a reset transistor formed at the doped layer for periodically resetting a charge level of said second doped region, said second doped region being the source of said reset transistor.
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75-81. -81. (canceled)
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82. A CMOS imager comprising:
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a substrate having a doped layer of a first conductivity type;
an array of pixel sensor cells formed in said doped layer, wherein each pixel sensor cell has a plurality of trench photosensors; and
signal processing circuitry electrically connected to receive and process output signals from said array. - View Dependent Claims (83, 84, 85, 86, 87)
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88. An integrated circuit imager comprising:
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an array of pixel sensor cells formed in a substrate, wherein each pixel sensor cell has a plurality of trench photosensors;
signal processing circuitry formed in said substrate and electrically connected to the array for receiving and processing signals representing an image output by the array and for providing output data representing said image; and
a processor for receiving and processing data representing said image.
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89. An integrated circuit imager comprising:
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a CMOS imager, said CMOS imager comprising an array of pixel sensor cells formed in a doped layer on a substrate, wherein each pixel sensor cell has a plurality of trench photosensors with a first doped region formed therein, each of said cells having a respective second doped region for receiving and outputting image charge received from said first doped region, and signal processing circuitry formed in said substrate and electrically connected to the array for receiving and processing signals representing an image output by the array and for providing output data representing said image; and
a processor for receiving and processing data representing said image.
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90-116. -116. (canceled).
Specification