System for synchronizing display of images in a multi-display computer system

• US 20050093854A1
• Filed: 10/30/2003
• Published: 05/05/2005
• Est. Priority Date: 10/30/2003
• Status: Active Grant

• Current Assignee: RPX Corporation
• Original Assignee: Silicon Graphics Incorporated (Graphics Properties Holdings, Inc.)
• Inventors: Klenoski, John A., Kennedy, Joseph P., Sadowski, Greg
• Granted Patent: US 7,499,044 B2
• Time in Patent Office: Days
• US Class Current: 345/213
• CPC Class Codes: G06F 3/1423 controlling a plurality of local displays, e.g. CRT and flat panel display
• CPC Class Codes: G09G 2360/02 Graphics controller able to handle multiple formats, e.g. input or output formats
• CPC Class Codes: G09G 3/2096 Details of the interface to the display terminal specific for a flat panel suitable for both CRT and flat panel G09G5/006; specific for a CRT G09G1/167
• CPC Class Codes: G09G 5/008 Clock recovery
• CPC Class Codes: G09G 5/12 Synchronisation between the display unit and other units, e.g. other display units, video-disc players

Abstract

An image display system synchronizes the display of images on a plurality of display devices. The system includes a first computer system generating a first signal representing first image data to be displayed on a first display device, a second computer system generating a second signal representing second image data to be displayed on a second display device, and means for synchronizing the first and second image data. The synchronizing means includes a phase-locked loop circuit having a digital rate controller. The digital rate controller allows programmable control of the speed of the phase-locked loop.

Claims

1. An image display system for synchronizing the display of images on a plurality of display devices, comprising:

a first computer system generating a first signal representing first image data to be displayed on a first display device;

a second computer system generating a second signal representing second image data to be displayed on a second display device; and

means for synchronizing said first and second image data, said synchronizing means comprising a phase lock loop circuit having a digital rate controller to control a lock rate of said phase look loop circuit.

2. The image display system of claim 1, further comprising:

second means for synchronizing said first and second image data, said second synchronizing means comprising a phase lock loop circuit having a digital rate controller to control a lock rate of said phase look loop circuit of said second synchronization means,

wherein said first synchronizing means is associated with said first computer system, said second synchronizing means is associated with said second computer system, and wherein said first and second synchronizing means are synchronized to a master sync signal.

3. The image display system of claim 2, wherein each synchronizing means comprises:

a sync separator for receiving said master sync signal and producing a master pulse stream;

a phase detector for comparing said master pulse stream to a slave pulse stream to produce a difference pulse stream;

a low pass filter for filtering said difference pulse stream to produce an analog signal;

a voltage controlled oscillator for producing a clock signal in response to said analog signal; and

said digital rate controller, wherein said digital rate controller divides said clock signal by a divisor value to produce said slave pulse stream, and wherein said digital rate controller produces said divisor value based on a programmable rate value and a comparison of said master pulse stream and said slave pulse stream.

4. The image display system of claim 3, wherein said first and second image data comprise video.

5. The image display system of claim 4, wherein each of said first and second computer systems further comprise:

a video generator for generating a video signal in response to said clock signal.

6. The image display system of claim 1, wherein said synchronizing means is associated with said second computer system, and wherein said second synchronizing means synchronizes generation of said second signal to said first signal.

7. The image display system of claim 6, wherein each synchronizing means comprises:

a sync separator for receiving said first signal and producing a master pulse stream;

a phase detector for comparing said master pulse stream to a slave pulse stream to produce a difference pulse stream;

a low pass filter for filtering said difference pulse stream to produce an analog signal;

a voltage controlled oscillator for producing a clock signal in response to said analog signal; and

said digital rate controller, wherein said digital rate controller divides said clock signal by a divisor value to produce said slave pulse stream, and wherein said digital rate controller produces said divisor value based on a programmable rate value and a comparison of said master pulse stream and said slave pulse stream.

8. The image display system of claim 6, wherein said wherein said first and second image data comprise computer graphics images.

9. The image display system of claim 8, wherein each of said first and second computer systems further comprise:

a graphics processor for generating said computer graphics images.

10. The image display system of claim 9, wherein said graphics processor of said second computer system generates computer graphics images in response to said clock signal.

11. An apparatus for synchronizing to a first digital signal, generation of a second digital signal, comprising:

a phase detector for comparing the first digital signal to a comparison pulse stream to produce a difference pulse stream;

a low pass filter for filtering said difference pulse stream to produce an analog signal;

a voltage controlled oscillator for producing the second digital signal in response to said analog signal; and

a digital rate controller that divides the second digital signal by a divisor value to produce said comparison pulse stream, wherein said digital rate controller produces said divisor value based on a programmable rate value and a comparison of the first digital signal and said comparison pulse stream.

12. A system for synchronizing video frame rate between a first video system displaying video images on a first display device and a second video system displaying video images on a second display device, the system comprising:

a master sync signal generator;

a first video input/output module associated with said first video system; and

a second video input/output module associated with said second video system,

wherein each of said video input/output modules comprises

a sync separator that receives said master sync signal and produces a master pulse stream therefrom;

a phase detector that compares said master pulse stream to a slave pulse stream to produce a difference pulse stream;

a low pass filter that filters said difference pulse stream to produce an analog signal;

a voltage controlled oscillator that produces a video clock signal in response to said analog signal; and

a digital rate controller that divides said clock signal by a divisor value to produce said slave pulse stream, said digital rate controller producing said divisor value based on a programmable rate value and a comparison of said master pulse stream and said slave pulse stream.

13. The system of claim 12, wherein said video input/output modules further comprise:

a video generator to generate a video signal in response to said clock signal.