Electromechanical micromirror devices and methods of manufacturing the same

• US 20050094241A1
• Filed: 11/01/2003
• Published: 05/05/2005
• Est. Priority Date: 11/01/2003
• Status: Abandoned Application

• Current Assignee: Fusao Ishii
• Original Assignee: Fusao Ishii
• Inventors: Ishii, Fusao
• Application Number:
  US10/698,620
• Publication Number:
  US 20050094241A1
• Time in Patent Office: Days
• US Class Current: 359/290
• CPC Class Codes: G02B 26/0841 the reflecting element being moved or deformed by electrostatic means

Abstract

An electromechanical micromirror device comprises a device substrate with a 1st surface and a 2nd surface, control circuitry disposed on said 1st surface, and a micromirror disposed on said 2nd surface. Arrays of such micromirror devices are also described and may be used as a spatial light modulators (SLMs). The arrays may be 1 dimensional (linear) or 2 dimensional. Methods of fabricating micromirror devices and arrays of such devices are also disclosed. Such methods generally involve providing a device substrate with a 1st surface and a 2nd surface, fabricating control circuitry on the 1st surface, and fabricating micromirror(s) on the 2nd surface.

Claims

1. An electromechanical micromirror device, comprising:

a single substrate with a 1st surface and a 2nd surface;

a control circuitry disposed on said 1st surface of said single substrate; and

a micromirror section disposed on said 2nd surface of said single substrate;

wherein said micromirror section comprises;

a micromirror; and

at least one support structure for supporting said micromirror.

2. The device of claim 1, wherein:

said control circuitry comprising a circuit selected from the group consisting of;

CMOS circuits, NMOS circuits, PMOS circuits, bipolar circuits, BiCMOS circuits, DMOS circuits, HEMT circuits, amorphous silicon thin film transistor circuits, polysilicon thin film transistor circuits, SiGe transistor circuits, SiC transistor circuits, GaN transistor circuits, GaAs transistor circuits, InP transistor circuits, CdSe transistor circuits, organic transistor circuits, and conjugated polymer transistor circuits.

3. The device of claim 1, wherein:

said single substrate comprising a substrate selected from the group consisting of a silicon-on-insulator (SOI) substrate, a silicon substrate, a polycrystalline silicon substrate, a glass substrate, a plastic substrate, a ceramic substrate, a germanium substrate, a SiGe substrate a SiC substrate, a sapphire substrate a quartz substrate, a GaAs substrate, and an InP substrate.

4. The device of claim 1, wherein:

said micromirror section additionally comprises at least one addressing electrode for actuating said micromirror.

5. The device of claim 4, additionally comprising:

at least one electrically conductive routing line integral with said single substrate that connects said control circuitry to said at least one addressing electrode.

6. The device of claim 5, wherein:

said at least one electrically conductive routing line comprises a via through said single substrate and a metallization in said via.

7. The device of claim 1, wherein:

said single substrate additionally comprises an insulating layer between said first surface and said second surface.

8. The device of claim 1, wherein:

said micromirror further comprising a metallic mirror.

9. The device of claim 1, wherein:

said micromirror further comprising a multilayer dielectric mirror.

10. The device of claim 1, wherein:

said micromirror further comprising a substantially planar reflective side with neither recesses nor protrusions.

11. The device of claim 1, wherein:

said micromirror further comprising a reflective surface having no edges perpendicular to a projection direction of an incident light propagation vector onto said single substrate.

12. The device of claim 11, wherein:

said reflective surface of said micromirror further comprising a polygon-shaped reflective surface.

13. The device of claim 12, wherein:

said polygon-shaped reflective surface is selected from the group consisting of a rectangle-shaped reflective surface and a hexagon-shaped reflective surface.

14. The device of claim 1, wherein:

said micromirror section additionally comprises a torsion hinge disposed underneath and supporting said micromirror support structure; and

said torsion hinge further comprising a pair of supporting structures for supporting said torsion hinge on said substrate.

15. The device of claim 1, wherein:

said micromirror section additionally comprises at least one stopping member for limiting a rotation of said micromirror.

16. The device of claim 15, wherein:

said at least one stopping member comprises a 1st stopping member for limiting the rotation of said micromirror in a 1st direction; and

a 2nd stopping member for limiting the rotation of said micromirror in a direction opposite to said 1st direction.

17. An array of electromechanical micromirror devices comprising:

single substrate with a 1st surface and a 2nd surface;

a control circuitry disposed on said 1st surface of said substrate; and

an array of micromirror sections disposed on said 2nd surface of said single substrate wherein each said micromirror section comprises a micromirror; and

a support structure for supporting said micromirror.

18. The array of claim 17, wherein:

said control circuitry comprising a circuit selected from the group consisting of;

CMOS circuits, NMOS circuits, PMOS circuits, bipolar circuits, BiCMOS circuits, DMOS circuits, HEMT circuits, amorphous silicon thin film transistor circuits, polysilicon thin film transistor circuits, SiGe transistor circuits, SiC transistor circuits, GaN transistor circuits, GaAs transistor circuits, InP transistor circuits, CdSe transistor circuits, organic transistor circuits, and conjugated polymer transistor circuits.

19. The array of claim 17, wherein:

said single substrate comprising a substrate selected from the group consisting of a silicon-on-insulator (SOI) substrate, a silicon substrate, a polycrystalline silicon substrate a glass substrate, a plastic substrate a ceramic substrate, a germanium substrate, a SiGe substrate, a SiC substrate, a sapphire substrate, a quartz substrate, a GaAs substrate and an InP substrate.

20. The array of claim 17, wherein:

said micromirror section additionally comprises at least one addressing electrode for actuating said micromirror.

21. The array of claim 20, additionally comprising:

at least one electrically conductive routing line integral with said single substrate that connects said control circuitry to said at least one addressing electrode of at least one of said micromirror sections.

22. The array of claim 21, wherein:

said at least one electrically conductive routing line comprises a via through said single substrate and a metallization in said via.

23. The array of claim 17, wherein:

said single substrate additionally comprises an insulating layer between said first surface and said second surface.

24. The array of claim 17, wherein:

said micromirror further comprising a metallic mirror.

25. The array of claim 17, wherein:

said micromirror further comprising a multilayer dielectric mirror.

26. The array of claim 17, wherein:

said micromirror further comprising a substantially planar reflective side with neither recesses nor protrusions.

27. The array of claim 17, wherein:

said micromirror further comprising a reflective surface of having no edges perpendicular to a projection direction of an incident light propagation vector onto said single substrate.

28. The array of claim 27, wherein:

said reflective surface of said micromirror further comprising a polygon-shaped reflective surface.

29. The array of claim 28, wherein:

said polygon-shaped reflective surface is selected from the group consisting of a rectangle-shaped reflective surface and a hexagon-shaped reflective surface.

30. The array of claim 17, wherein:

said micromirror section additionally comprises a torsion hinge disposed underneath and supporting said micromirror support structure; and

said torsion hinge further comprising a pair of supporting structures for supporting said torsion hinge on said substrate.

31. The array of claim 17, wherein:

said micromirror section additionally comprises at least one stopping member for limiting a rotation of said micromirror.

32. The array of claim 17, wherein:

said at least one stopping member comprises a 1st stopping member for limiting the rotation of said micromirror in a 1st direction; and

a 2nd stopping member for limiting the rotation of said micromirror in a direction opposite to said 1st direction.

33. A spatial light modulator (SLM) comprising an array of electromechanical micromirror devices wherein said micro-mirror devices further comprising:

a single substrate with a 1st surface and a 2nd surface;

a control circuitry disposed on said 1st surface of said single substrate; and

an array of micromirror sections disposed on said 2nd surface of said single substrate wherein each said micromirror section comprises a micromirror; and

a support structure for supporting said micromirror.

34. A method of fabricating an array of electromechanical micromirrors comprising the steps of:

providing a single substrate with a 1st surface and a 2nd surface;

forming control circuitry on said 1st surface of said single substrate; and

forming a plurality of support structures on said second surface of said single substrate and forming a plurality of micromirrors on top of and supported by said support structures.

35. The method of claim 34, wherein:

said step of forming said control circuitry comprises a step of fabricating said control circuits selected from the group consisting of;

CMOS circuits, NMOS circuits, PMOS circuits, bipolar transistor circuits, BiCMOS circuits, DMOS circuits, HEMT circuits, amorphous silicon thin film transistor circuits, polysilicon thin film transistor circuits, SiGe transistor circuits, SiC transistor circuits, GaN transistor circuits, GaAs transistor circuits, InP transistor circuits, CdSe transistor circuits, organic transistor circuits, and conjugated polymer transistor circuits.

36. The method of claim 34, wherein:

said step of providing said single substrate further comprising a step of providing said single substrate is selected from a group consisting of a silicon-on-insulator (SOI) substrate, a silicon substrate, a polycrystalline silicon substrate, a glass substrate, a plastic substrate, a ceramic substrate, a germanium substrate, a SiGe substrate, a SiC substrate, a sapphire substrate, a quartz substrate, a GaAs substrate, and an InP substrate.

37. The method of claim 34, wherein:

said step of forming said micromirrors additionally comprises a step of forming a plurality of addressing electrodes for actuating said micromirrors.

38. The method of claim 37, additionally comprising a step of:

forming a plurality of electrically conductive routing lines integrated with said single substrate for connecting said control circuitry to said plurality of addressing electrodes.

39. The method of claim 38, wherein said step of:

forming said plurality of electrically conductive routing lines comprises the steps of;

forming at least one via through said substrate; and

forming a metallization in said at least one via.

40. The method of claim 34, wherein:

said step of providing said single substrate further comprising a step of providing a single substrate comprises an insulating layer between said 1st surface and said 2nd surface.

41. The method of claim 34, wherein:

said step of forming a plurality of micromirrors comprises a step of forming a reflective metallic coating on said micromirrors.

42. The method of claim 34, wherein:

said step of forming a plurality of micromirrors comprises a step of forming a reflective multilayer dielectric coating on said micromirrors.

43. The method of claim 34, wherein said step of forming said micromirrors comprises the steps of:

forming said plurality of micromirror support structures embedded in a sacrificial layer;

planarizing a top surface of said sacrificial layer and said micromirror support structures

depositing a micromirror material on said top-surface;

patterning said micromirror material to form a plurality of micromirrors; and

removing said sacrificial layer by an etching process.

44. The method of claim 43, wherein:

said step of forming said microstructures in said sacrificial layer further comprising a step of forming said microstructures in a layer composed of a material is selected from the group consisting of a photoresist polymer, a silicon oxide, a silicon nitride, a silicon oxynitride, and an amorphous silicon.

45. The method of claim 43, wherein:

said step of planarizing said top surface further comprising a step of applying a chemical mechanical polishing (CMP) process.

46. The method of claim 34, wherein said step of forming a plurality of micromirrors comprises a step of:

patterning said micromirrors to have no edges perpendicular to a projection direction of an incident light propagation vector onto a plane of said single substrate.

47. The method of claim 46, wherein:

said step of forming said micromirrors further comprising a step of patterning at least one of said micromirror as a polygon-shaped micromirror.

48. The method of claim 47, wherein:

said step of forming said polygon-shaped micromirror is a step of forming said micromirror either as a rectangle-shaped micromirror or a hexagon-shaped micromirror.

49. The method of claim 34, additionally comprising a step of:

forming a torsion hinge for supporting said support structures by forming a hinge support followed by forming a torsion hinge on top of and supported by said hinge support.

50. The method of claim 34, additionally comprising the step of:

forming at least one stopping member for limiting a rotation of said micromirror.

51. The method of claim 50, wherein said step of forming at least one stopping member comprises:

forming a 1st stopping member for limiting a rotation of said micromirror in a 1st direction; and

forming a 2nd stopping member for limiting a rotation of said micromirror in a direction opposite to said 1st direction.

52. A method of fabricating an array of electromechanical micromirrors, comprising the steps of:

providing a single silicon-on-insulator substrate with an epitaxial top silicon layer above an insulator layer, supported by a bottom silicon layer;

forming control circuitry on said epitaxial top silicon layer;

removing said bottom silicon layer, thereby exposing the insulator layer;

forming a plurality of support structures followed by forming a plurality of micromirrors on top of and supported by said support structures.

53. The method of claim 52, wherein:

said step of forming said control circuitry comprises a step of fabricating said control circuits selected from a group consisting of;

CMOS circuits, NMOS circuits, PMOS circuits, bipolar transistor circuits, BiCMOS circuits, and DMOS circuits.

54. The method of claim 52, wherein:

said step of removing said bottom silicon layer comprises a step of applying a backgrinding step to remove said bottom silicon layer.

55. The method of claim 52, wherein:

said step of removing said bottom silicon layer comprises a step of applying a chemical mechanical polishing (CMP) step to remove said bottom silicon layer.

56. The method of claim 52, additionally comprises a step of:

forming a plurality of addressing electrodes for actuating said plurality of micromirrors.

57. The method of claim 56, additionally comprising a step of:

forming a plurality of electrically conductive routing lines integrated with said single substrate for connecting said control circuitry to said plurality of addressing electrodes.

58. The method of claim 57, wherein said step of forming said plurality of electrically conductive routing lines comprises the steps of:

forming at least one via through said substrate; and

forming a metallization in said via.

59. The method of claim 52, wherein said step of forming said micromirrors the steps of:

forming said plurality of micromirror support structures embedded in a sacrificial layer;

planarizing a top surface of said sacrificial layer and said micromirror support structures;

depositing a micromirror material on said top-surface;

patterning said micromirror material to form a plurality of micromirrors; and

removing said sacrificial layer by an etching process.

60. The method of claim 59, wherein:

said step of planarizing said top surface further comprising a step of applying a chemical mechanical polishing (CMP) process.