Ultrathin form factor MEMS microphones and microspeakers

• US 20050095813A1
• Filed: 11/05/2003
• Published: 05/05/2005
• Est. Priority Date: 11/05/2003
• Status: Active Grant

• Current Assignee: Akustica Incorporated
• Original Assignee: Akustica Incorporated
• Inventors: Zhu, Xu, Ciferno, Raymond A.
• Granted Patent: US 6,936,524 B2
• Time in Patent Office: Days
• US Class Current: 438/459
• CPC Class Codes: B81C 1/00182 Arrangements of deformable or non-deformable structures, e.g. membrane and cavity for use in a transducer
• CPC Class Codes: H04R 19/005 using semiconductor materials
• CPC Class Codes: Y10S 438/977 Thinning or removal of substrate

Abstract

A process comprises reducing the thickness of a substrate carrying a plurality of devices, with at least certain of the devices having a micro-machined mesh. A carrier wafer is attached to the back side of the substrate and the fabrication of the devices is completed from the top side of the substrate. Thereafter the plurality of devices is singulated. Various alternative embodiments are disclosed which demonstrate that the thinning of the wafer may occur at different times during the process of fabricating the MEMS devices such as before the mesh is formed or after the mesh is formed. Additionally, the use of carrier wafers to support the thinned wafer enables process steps to be carried out on the side opposite from the side having the carrier wafer. The various alternative embodiments demonstrate that the side carrying the carrier wafer can be varied throughout the process.

Claims

1. A process, comprising:

reducing the thickness of a substrate carrying a plurality of devices, at least certain of the devices having a micromachined mesh;

attaching a carrier wafer to the back side of the substrate;

completing the fabrication of the devices from the top side of the substrate, said completing comprising forming certain of said meshes; and

singulating said plurality of devices.

2. The process of claim 1 wherein said completing comprises:

releasing at least certain of the formed meshes; and

fabricating vent holes that connect through the substrate in at least certain of the areas where the released meshes are located.

3. The process of claim 2 wherein said singulating said plurality of devices is performed substantially simultaneously with said releasing.

4. The process of claim 3 additionally comprising removing said carrier wafer.

5. The process of claim 2 wherein said singulating said plurality of devices is performed substantially simultaneously with said fabricating.

6. The process of claim 5 additionally comprising removing said carrier wafer.

7. The process of claim 2 wherein said fabricating is performed after said releasing.

8. The process of claim 2 wherein said fabricating is performed simultaneously with said releasing.

9. The process of claim 2 wherein said fabricating comprises using said formed mesh as an etch mask.

10. The process of claim 1 wherein said completing comprises:

forming pilot openings in said substrate by using at least portions of certain of said formed meshes as an etch mask;

releasing at least certain of said formed meshes by removing a portion of substrate beneath the meshes, and

fabricating vent holes substantially simultaneously with said releasing by enlarging said pilot openings.

11. The process of claim 10 wherein an anisotropic etch is used to form said pilot openings and an isotropic etch is used for releasing the meshes and fabricating the vent holes.

12. A process, comprising:

reducing the thickness of a substrate carrying a plurality of devices, at least certain of the devices having a mesh;

attaching a first carrier wafer to the back side of the substrate;

forming and releasing a mesh;

attaching a second carrier wafer to the top side of the substrate and removing said first carrier wafer from the back side of the substrate;

fabricating vent holes from the back of the substrate; and

singulating said devices.

13. The process of claim 12 wherein said singulating is performed substantially simultaneously with said forming.

14. The process of claim 13 additionally comprising removing said second carrier wafer after said singulating.

15. The process of claim 12 wherein said singulating comprises dicing the substrate.

16. The process of claim 15 additionally comprising removing said second carrier wafer after said dicing.

17. A process, comprising:

reducing the thickness of a substrate carrying a plurality of devices, at least certain of the devices having a mesh;

attaching a first carrier wafer to the back side of the substrate;

forming a mesh;

attaching a second carrier wafer to the top side of the substrate and removing said first carrier wafer from the back side of the substrate;

fabricating vent holes from the back of the substrate;

attaching a third carrier wafer to the back side of the substrate and removing the second carrier from the top side of the substrate;

releasing the mesh; and

singulating said devices.

18. The process of claim 17 wherein said singulating is performed substantially simultaneously with said releasing.

19. The process of claim 18 additionally comprising removing said third carrier wafer after said singulating.

20. The process of claim 17 wherein said singulating comprises dicing the substrate.

21. The process of claim 20 additionally comprising removing said third carrier wafer after said dicing.

22. A process, comprising:

reducing the thickness of a substrate carrying a plurality of devices, at least certain of the devices having a mesh;

attaching a first carrier wafer to the back side of the substrate;

patterning a resist to define a mesh;

attaching a second carrier wafer to the top side of the substrate and removing said first carrier wafer from the back side of the substrate;

fabricating vent holes from the back of the substrate;

attaching a third carrier wafer to the back side of the substrate and removing the second carrier from the top side of the substrate;

forming and releasing the mesh; and

singulating said devices.

23. The process of claim 22 wherein said singulating is performed substantially simultaneously with said releasing.

24. The process of claim 23 additionally comprising removing said third carrier wafer after said singulating.

25. The process of claim 22 wherein said singulating comprises dicing the substrate.

26. The process of claim 25 additionally comprising removing said third carrier wafer after said dicing.

27. In a process for fabricating a MEMS device, the improvement comprising:

reducing the thickness of a substrate carrying a plurality of devices, at least certain of said devices having a micromachined mesh; and

attaching a carrier wafer to the back side of the substrate for at least a part of the process of fabricating the MEMS device including forming certain of said meshes.

28. In a process for fabrication a MEMS device, the improvement comprising:

reducing the thickness of a substrate; and

attaching a carrier wafer to a back side of the substrate to enable process steps to be performed from the top side of the substrate; and

attaching a carrier wafer to the top side of the substrate and removing the carrier wafer from the back side of the substrate to enable process steps to be performed from the back side of the substrate.