Method of fabricating vertical structure LEDs

• US 20050098792A1
• Filed: 12/03/2004
• Published: 05/12/2005
• Est. Priority Date: 04/09/2002
• Status: Active Grant

• Current Assignee: Suzhou Lekin Semiconductor Company Limited
• Original Assignee: LG Electronics, Inc. (LG Corporation)
• Inventors: Yoo, Myung Cheol, Jeong, In-Kwon, Lee, Jong-Lam
• Granted Patent: US 7,569,865 B2
• Time in Patent Office: Days
• US Class Current: 257/103
• CPC Class Codes: H01C 7/006 Thin film resistors
• CPC Class Codes: H01C 7/008 Thermistors H01C7/02 - H01C7/06 take precedence
• CPC Class Codes: H01L 27/0802 Resistors only
• CPC Class Codes: H01L 28/20 Resistors
• CPC Class Codes: H01L 33/0025 comprising only AIIIBV compounds
• CPC Class Codes: H01L 33/007 comprising nitride compounds
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/0095 Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
• CPC Class Codes: H01L 33/06 within the light emitting region, e.g. quantum confinement structure or tunnel barrier
• CPC Class Codes: H01L 33/12 with a stress relaxation structure, e.g. buffer layer
• CPC Class Codes: H01L 33/32 containing nitrogen
• CPC Class Codes: H01L 33/36 characterised by the electrodes
• CPC Class Codes: H01L 33/38 with a particular shape
• CPC Class Codes: H01L 33/40 Materials therefor
• CPC Class Codes: H01L 33/44 characterised by the coatings, e.g. passivation layer or anti-reflective coating
• CPC Class Codes: H01L 33/62 Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
• CPC Class Codes: Y10S 438/958 Passivation layer
• CPC Class Codes: Y10S 438/977 Thinning or removal of substrate

Abstract

A method of fabricating semiconductor devices, such as GaN LEDs, on insulating substrates, such as sapphire. Semiconductor layers are produced on the insulating substrate using normal semiconductor processing techniques. Trenches that define the boundaries of the individual devices are then formed through the semiconductor layers and into the insulating substrate, beneficially by using inductive coupled plasma reactive ion etching. The trenches are then filled with an easily removed layer. A metal support structure is then formed on the semiconductor layers (such as by plating or by deposition) and the insulating substrate is removed. Electrical contacts, a passivation layer, and metallic pads are then added to the individual devices, and the individual devices are then diced out.

Claims

1. A light-emitting device, comprising:

a metal layer;

a GaN contact layer adjacent the metal layer;

a GaN buffer layer;

a light-emitting layer disposed between the GaN contact layer and the GaN buffer layer; and

an ohmic contact on the GaN buffer layer.

2. The light-emitting device according to claim 1, further including a metallic pad over the ohmic contact.

3. The light-emitting device according to claim 1, further including a passivation layer over surfaces of the GaN contact layer, of the light emitting layer, and of the GaN buffer layer.

4. The light-emitting device according to claim 3, wherein the passivation layer extends over part of the ohmic contact.

5. The light-emitting device according to claim 3, wherein the passivation layer includes a material selected from a group consisting of SiO₂ and Si₃N₄.

6. The light-emitting device according to claim 1, wherein the light emitting layer includes Ga.

7. The light-emitting device according to claim 1, wherein the GaN contact layer is doped.

8. The light-emitting device according to claim 1, wherein the metal layer includes a metal selected from a group consisting of Cu, Cr, Ni, Au, Ag, Mo, Pt, Pd, W, and Al.

9. The light-emitting device according to claim 1, wherein the metal layer includes titanium nitride.

10-42. -42. (canceled)