Liquid crystal display device and method for driving the same

• US 20050099378A1
• Filed: 11/08/2004
• Published: 05/12/2005
• Est. Priority Date: 11/10/2003
• Status: Active Grant

• Current Assignee: LG Display Co., Ltd.
• Original Assignee: LG Philips LCD Company Limited (LG Display Co., Ltd.)
• Inventors: Kim, Kyong Soek
• Granted Patent: US 7,471,274 B2
• Time in Patent Office: Days
• US Class Current: 345/99
• CPC Class Codes: G02F 1/134309 characterised by their geometrical arrangement
• CPC Class Codes: G02F 2201/52 RGB geometrical arrangements
• CPC Class Codes: G09G 2300/0443 with several sub-pixels for the same colour in a pixel, not specifically used to display gradations G09G3/364 takes precedence
• CPC Class Codes: G09G 3/3614 Control of polarity reversal in general
• CPC Class Codes: G09G 3/3655 Details of drivers for counter electrodes, e.g. common electrodes for pixel capacitors or supplementary storage capacitors

Abstract

A liquid crystal display device has odd- and even-numbered rows of pixels sequentially and repeatedly arranged on a substrate in the horizontal direction, alternate rows being shifted horizontally, first and second groups of data lines for dividing the odd and even-numbered rows of pixels, respectively, into first sub-pixels and second sub-pixels and partitioning the even and odd-numbered rows of pixels, respectively. First and second groups of data lines are alternately arranged on the substrate in the vertical direction, for supplying data signals to the first and second sub-pixels, respectively, through switching devices disposed in each sub-pixel. Gate lines arranged on the first substrate in every two row of pixels in the horizontal direction, for supplying pulse-type scan signals to row units of the first sub-pixels and the second sub-pixels, and common voltage lines are arranged between the gate lines.

Claims

1. A liquid crystal display device, comprising:

rows of pixels arranged in a horizontal direction on a substrate, disposed such that adjacent pixels are separated by a distance D, odd-numbered and even numbered rows being displaced with respect to each other in the horizontal direction by a distance D/2;

a first data line, disposed to divide the pixels of the odd-numbered rows into first sub-pixels and to partition the pixels of the even-numbered rows, and a second data line, disposed to divide the pixels of the even-numbered rows into second sub-pixels and to partition the pixels of the odd-numbered rows, the data lines being arranged on the substrate in a vertical direction;

gate lines arranged on the substrate and spaced to correspond to every two row of pixels; and

common voltage lines arranged on the substrate alternately with the gate lines.

2. The device according to claim 1, wherein each row of pixels comprises R, G and B pixels arranged sequentially and repetitively.

3. The device according to claim 2, wherein the R, G and B pixels of sequential rows of pixels are disposed in a delta configuration.

4. The device according to claim 1, further comprising first electrodes and second electrodes individually disposed in the first sub-pixels and the second sub-pixels, and switching devices disposed in each of the first and second sub-pixels.

5. The device according to claim 4, wherein the first and second electrodes are disposed to form a horizontal electric field.

6. The device according to claim 1, wherein pulse-form scan signals are supplied, sequentially time shifted in successive gate lines, and pulse-form common voltages are synchronized with the rising edge of scan signals and maintain a high or low potential for a time duration of a frame.

7. The device of claim 1, wherein the gate lines and the common voltage lines are arranged in a straight line shape.

8. The device of claim 1, wherein the gate lines and the common voltage lines are arranged in a zigzag shape.

9. The device of claim 4, wherein the first electrodes are pixel electrodes and the second electrodes are common electrodes.

10. The device of claim 9, wherein the switching devices are symmetrically formed at both sides of the first and second data lines, and connected to the first electrodes of the first sub-pixels and the second sub pixels.

11. The device of claim 10, wherein the switching devices are thin film transistors having their gate electrodes connected to the gate lines, their source electrodes connected to the first group of data lines or the second group of data lines, and their drain electrodes connected to the first electrodes of the first sub-pixels or the second sub-pixels.

12. The device of claim 1, wherein the first electrodes and the second electrodes in at least one of the first sub-pixels and the second sub-pixels are arranged in a zigzag shape.

13. The device of claim 12, wherein the first electrodes and the second electrodes of each sub-pixel are symmetrically arranged.

14. A liquid crystal display device, comprising:

odd-numbered rows of R, G and B pixels arranged sequentially and repeatedly on a substrate in the horizontal direction;

even-numbered rows of R, G and B pixels arranged sequentially and repeatedly on the substrate to be shifted from the odd-numbered rows of pixels;

dots formed by delta-arranging three R, G and B pixels of the odd-numbered rows and the even-numbered rows;

a first group of data lines for dividing the odd-numbered rows of pixels into first sub-pixels and partitioning the even-numbered rows of pixels, and a second group of data lines for dividing the even-numbered rows of pixels into second sub-pixels and partitioning the odd-numbered rows of pixels, the first and second groups of data lines being alternately arranged on the substrate in the vertical direction;

first electrodes and second electrodes individually disposed in the first sub-pixels and the second sub-pixels, for forming a horizontal electric field;

switching devices individually disposed in the first sub-pixels and the second sub-pixels;

gate lines arranged on the substrate in every two row of the pixels in the horizontal direction, for supplying scan signals of pulse form sequentially shifted in every two row of the first sub-pixels and the second sub-pixels; and

common voltage lines arranged between the gate lines, for supplying common voltages of pulse form synchronized with rising edges of the scan signals for maintaining a high or low potential for one frame to the second electrodes disposed in the first sub-pixels and the second sub-pixels.

15. A liquid crystal display device, comprising:

horizontal rows of pixels, alternate rows being disposed horizontally displaced from each other;

first data lines disposed vertically such that pixels in odd-numbered rows are divided into first sub-pixels, and second data lines disposed vertically such that pixels in even-numbered rows are divided into second sub-pixels;

gate lines disposed with a spacing corresponding to two horizontal rows of pixels;

common voltage lines disposed with a spacing corresponding to two horizontal lines of pixels and interleaved with the gate lines;

first electrodes and second electrodes individually disposed in the first sub-pixels and the second sub-pixels; and

switching devices individually disposed in the first sub-pixels and the second sub-pixels.

16. A liquid crystal display device, comprising:

horizontal rows of pixels, alternate rows being disposed horizontally displaced from each other, pixels in each row being divided into first and second groups of sub-pixels by alternate vertically disposed data lines;

means for supplying the first group of sub-pixels with data signals;

means for supplying the second group of sub-pixels with data signals;

means for supplying scan signals to the sub pixels; and

means for supplying common voltages to the sub pixels;

wherein the common voltages are of pulse form and synchronized with rising edges of the scan signals for maintaining a high or low potential for one frame.

17. A driving method of a liquid crystal display device in which odd-numbered rows of pixels and even-numbered rows of pixels are arranged to be shifted horizontally with respect to each other on a substrate and dots are formed by delta-arranging three R, G and B pixels of the odd-numbered rows and the even-numbered rows, the method comprising:

turning-on switching devices disposed in the odd-numbered rows of pixels and the even-numbered rows of pixels, by supplying scan signals of pulse form sequentially to gate lines arranged on the substrate in every two row of pixels;

supplying common voltages of pulse form synchronized with rising edges of the scan signals for maintaining a high or low potential for one frame to pixel electrodes disposed in the odd-numbered rows of pixels and the even-numbered rows of pixels through common voltage lines arranged between the gate lines; and

driving the dots in a row, by supplying image information to the pixel electrodes disposed in the odd-numbered rows of pixels and the even-numbered rows of pixels through the turned-on switching devices, by supplying the image information to a first group of data lines and a second group of data lines alternately arranged on the substrate in the vertical direction.

18. The method of claim 17, wherein the image information is supplied to the odd-numbered rows and the even-numbered rows of pixels according to a dot inversion method.

19. The method of claim 17, wherein the odd-numbered rows and the even-numbered rows of pixels are driven according to a line inversion method.