Extended link monitoring channel for 10 Gb/s Ethernet

• US 20050102419A1
• Filed: 11/06/2003
• Published: 05/12/2005
• Est. Priority Date: 11/06/2003
• Status: Active Grant

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Wolski, Stanislas, Mathur, Niraj Rajendra, Trepanier, Daniel Pierre, Popescu, Petre
• Granted Patent: US 7,949,782 B2
• Time in Patent Office: Days
• US Class Current: 709/238
• CPC Class Codes: H04L 43/00 Arrangements for monitoring or testing data switching networks
• CPC Class Codes: H04L 43/0811 by checking connectivity

Abstract

The invention provides a method for utilizing the Inter Packet Gaps (IPGs) to create an Extended Link Monitoring Channel in a physical layer transceiver for a 10 Gb/s Ethernet link for communicating link related information, thus providing an extensive link maintenance capability. A corresponding transceiver between an Ethernet media access control (MAC) layer device and a 10 Gb/s Ethernet link, comprising a physical coding sublayer (PCS) extension circuit for implementing the Extended Link Monitoring Channel is also provided.

Claims

1. A transceiver between an Ethernet media access control (MAC) layer device and a 10 Gb/s Ethernet link, comprising a physical coding sublayer (PCS) extension circuit for implementing an extended link monitoring channel for said link for communicating link related information during idle periods between user data packets.

2. A transceiver as described in claim 1, the PCS extension circuit comprising means for initializing said extended link monitoring channel, and means for transmitting and receiving the link related information.

3. A transceiver as described in claim 2, wherein the PCS extension circuit has a means for processing a10Gb/s Ethernet signal in the form of 64B/66B blocks.

4. A transceiver as described in claim 3, wherein the means for processing comprises means for determining idle blocks of the idle periods within said Ethernet signal and replacing selected idle blocks with extended link monitoring blocks, and means for determining extended link monitoring blocks within said Ethernet signal and replacing them with idle blocks.

5. A transceiver as described in claim 4, the PCS extension circuit being controlled by an external device for the purpose of initializing said extended link monitoring channel, and for inserting and extracting the link related information.

6. A transceiver as described in claim 4, wherein the means for transmitting and receiving the link related information comprises means for generating a pseudo-random bit sequence (PRBS) and evaluating a received PRBS for the purpose of determining a bit error rate (BER) for the link.

7. A transceiver as described in claim 1, wherein the link is a 10GBASE-R Ethernet link of the IEEE 802.3 Ethernet standard.

8. A transceiver as described in claim 1, wherein the link is an optical link.

9. A transceiver as described in claim 1, wherein the PCS extension circuit comprises means for splitting the extended link monitoring channel into a number of virtual link monitoring channels, each of the virtual link monitoring channels intended for communicating a different type of the link related information.

10. A physical coding sublayer (PCS) extension circuit for a 10 Gb/s Ethernet transceiver, providing signal adaptation between an Ethernet media access control (MAC) layer device and a 10 Gb/s Ethernet link, the PCS extension circuit comprising means for implementing an extended link monitoring channel for said link for transmitting link related information during idle periods between user data packets.

11. A PCS extension circuit as described in claim 10, the PCS extension circuit comprising means for initializing said extended link monitoring channel, and means for transmitting and receiving the link related information.

12. A PCS extension circuit as described in claim 11, the PCS extension circuit having means for processing an Ethernet signal in the form of 64B/66B blocks.

13. A PCS extension circuit as described in claim 12, wherein the means for processing comprises means for determining idle blocks within said Ethernet signal and replacing selected idle blocks with extended link monitoring blocks, and means for means for determining extended link monitoring blocks within said Ethernet signal and replacing them with idle blocks.

14. A PCS extension circuit as described in claim 13, the PCS extension circuit being controlled by an external device for the purpose of initializing said extended link monitoring channel, and for inserting and extracting the link related information.

15. A PCS extension circuit as described in claim 13, wherein the means for transmitting and receiving the link related information comprises means for generating a pseudo-random bit sequence (PRBS) and evaluating a received PRBS for the purpose of determining a bit error rate (BER) for the link.

16. A. PCS extension circuit as described in claim 10, wherein the transceiver is designed for a 10GBASE-R Ethernet link of the IEEE 802.3 Ethernet standard.

17. A PCS extension circuit as described in claim 10, wherein the transceiver is designed for an optical link.

18. A PCS extension circuit as described in claim 10, further comprising means for splitting the extended link monitoring channel into a number of virtual link monitoring channels, each of the virtual link monitoring channels intended for communicating a different type of the link related information.

19. A node in an a 10 Gb/s Ethernet network, comprising at least two nodes connected by a 10 Gb/s Ethernet link, the node having a transceiver between an Ethernet media access control (MAC) layer device and the 10 Gb/s Ethernet link, the transceiver comprising a physical coding sublayer (PCS) extension circuit for implementing an extended link monitoring channel for said link for transmitting link related information during idle periods between user data packets.

20. A node as described in claim 19, wherein the PCS extension circuit has a means for processing an Ethernet signal in the form of 64B/66B blocks, the means for processing comprising means for determining idle blocks within said Ethernet signal and replacing selected idle blocks with extended link monitoring blocks, and means for determining extended link monitoring blocks within said Ethernet signal and replacing them with idle blocks.

21. A node as described in claim 20, wherein the PCS extension circuit comprises means for generating a pseudo-random bit sequence (PRBS) to be sent through said extended link monitoring channel, and evaluating a received PRBS for the purpose of determining a bit error rate (BER) for the link.

22. A communications network, comprising a plurality of nodes, at least one node being the node of claim 19 connected to at least one other node of claim 19.

23. A method for implementing an extended link monitoring channel for a 10 Gb/s Ethernet link carrying an Ethernet signal in the form of blocks of N bits, the method comprising the step of communicating link monitoring information over said channel, wherein the step of communicating comprises determining idle blocks between blocks of user data and substituting selected idle blocks with extended link monitoring blocks including blocks to carry link related information and control blocks for said channel.

24. A method as described in claim 23, wherein the step of substituting selected idle blocks with control blocks for said channel comprises constructing said control blocks according to the IEEE 802.3 Ethernet standard and using selected reserved codes of the standard.

25. A method as described in claim 24, the method being performed for the Ethernet signal in the form of blocks of 66 bits according to the IEEE 802.3 Ethernet standard for 10 GBASE-R Ethernet links.

26. A method as described in claim 24, further comprising the step of initializing said channel, the step of initializing being performed before the step of communicating, wherein the step of initializing comprises:

determining idle blocks between blocks of user data and substituting selected idle blocks with ping blocks, which are a type of the control blocks to be sent to the far end; and

receiving ping blocks from the far end.

27. A method as described in claim 26, wherein the step of substituting with the ping blocks comprises substituting with ping blocks constructed with such selected reserved codes of the IEEE 802.3 Ethernet standard that, when received by a transceiver at the far end which lacks the PCS extension circuit, the ping blocks will not be recognized and interpreted as if they were idle blocks of the standard.

28. A method as described in claim 23, wherein the step of substituting selected idle blocks with extended link monitoring blocks comprises substituting each of the selected idle blocks with one of the following types of the extended link monitoring blocks:

a Q-start block;

a channel data block; and

a Q-stop block,

wherein the Q-start block and Q-stop block are control blocks, and the channel data block carries the link related information.

29. A method as described in claim 26, wherein the step of initializing comprises:

substituting the selected idle blocks with the ping blocks to be sent to the far end so that only each (N₁+1)-th idle block is substituted with the ping block until a total of Nx ping blocks has been substituted; and

receiving from the far end at least N_R ping blocks separated by no more than N_J idle blocks, N_R being less or equal to N_X, and N_J being equal to or greater than N_J.

30. A method as described in claim 29, wherein N_J=16, N_X=16, N_R=8, N_J=32.

31. A method as described in claim 28, wherein the step of communicating comprises substituting the selected idle blocks with a sequence of the Q-start block, zero or more of the channel data blocks, and the Q-stop block, the sequence forming a link monitoring packet.

32. A method as described in claim 28, wherein the step of substituting with the Q-start block comprises substituting with the Q-start block having an identifier for a virtual link monitoring channel within said extended link monitoring channel, the virtual link monitoring channel intended for communicating a specific type of the link related information.

33. An extended link monitoring channel for a 10 Gb/s Ethernet link extending between a physical coding sublayer (PCS) devices for communicating link related information during idle periods between user data packets, the link related information being one or more of the following:

a pseudo random bit sequence (PRBS) for bit error rate measurement;

data from a digital optical monitoring (DOM) subsystem for monitoring optical link parameters;

information contained in registers of the PCS devices; and

link states and alarms.