Method of fabricating a semiconductor device

• US 20050104068A1
• Filed: 12/17/2004
• Published: 05/19/2005
• Est. Priority Date: 11/17/1998
• Status: Active Grant

• Current Assignee: Shunpei Yamazaki
• Original Assignee: Shunpei Yamazaki
• Inventors: Yamazaki, Shunpei
• Granted Patent: US 7,439,543 B2
• Time in Patent Office: Days
• US Class Current: 257/66
• CPC Class Codes: H01L 2029/7863 with an LDD consisting of more than one lightly doped zone or having a non-homogeneous dopant distribution, e.g. graded LDD
• CPC Class Codes: H01L 21/28114 characterised by the sectional shape, e.g. T, inverted-T
• CPC Class Codes: H01L 27/12 the substrate being other than a semiconductor body, e.g. an insulating body
• CPC Class Codes: H01L 27/1214 comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
• CPC Class Codes: H01L 27/1222 with a particular composition, shape or crystalline structure of the active layer
• CPC Class Codes: H01L 29/42384 for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
• CPC Class Codes: H01L 29/66492 with a pocket or a lightly doped drain selectively formed at the side of the gate
• CPC Class Codes: H01L 29/66598 forming drain [D] and lightly doped drain [LDD] simultaneously, e.g. using implantation through the wings a T-shaped layer, or through a specially shaped layer
• CPC Class Codes: H01L 29/66757 Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
• CPC Class Codes: H01L 29/78621 with LDD structure or an extension or an offset region or characterised by the doping profile
• CPC Class Codes: H01L 29/78627 with a significant overlap between the lightly doped drain and the gate electrode, e.g. GOLDD
• CPC Class Codes: H01L 29/78675 with normal-type structure, e.g. with top gate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621
• CPC Class Codes: H10K 50/8445 multilayered coatings having a repetitive structure, e.g. having multiple organic-inorganic bilayers
• CPC Class Codes: H10K 59/10 OLED displays
• CPC Class Codes: H10K 59/12 Active-matrix OLED [AMOLED] displays
• CPC Class Codes: H10K 59/1213 the pixel elements being TFTs
• CPC Class Codes: H10K 59/123 Connection of the pixel electrodes to the thin film transistors [TFT]

Abstract

There is provided a thin film transistor having improved reliability. A gate electrode includes a first gate electrode having a taper portion and a second gate electrode with a width narrower than the first gate electrode. A semiconductor layer is doped with phosphorus of a low concentration through the first gate electrode. In the semiconductor layer, two kinds of n⁻-type impurity regions are formed between a channel formation region and n⁺-type impurity regions. Some of the n⁻-type impurity regions overlap with a gate electrode, and the other n⁻-type impurity regions do not overlap with the gate electrode. Since the two kinds of n⁻-type impurity regions are formed, an off current can be reduced, and deterioration of characteristics can be suppressed.

Claims

1. An electronic equipment having a display device comprising:

a substrate;

a first thin film transistor formed over the substrate, said first thin film transistor comprising;

a first semiconductor island including at least a first channel formation region, a second channel formation region, lightly doped regions and source and drain regions;

a first gate insulating film formed over the first semiconductor island;

a first gate electrode formed over the first channel formation region with the first gate insulating film interposed therebetween; and

a second gate electrode formed over the second channel formation region with the first gate insulating film interposed therebetween;

a driving circuit including at least one second thin film transistor formed over the substrate, said second thin film transistor comprising;

a second semiconductor island including at least a third channel formation region;

a second gate insulating film formed over the second semiconductor island;

a third gate electrode formed over the third channel formation region with the second gate insulating film interposed therebetween;

an interlayer insulating film covering the first, second and third gate electrodes and said first and second semiconductor islands; and

a pixel electrode formed over the interlayer insulating film and electrically connected to one of the source and drain regions of the first semiconductor island,

wherein each of the first, second and third gate electrodes has tapered edges with a taper angle in a range of 3°

to 60°

.

2. The electronic equipment according to claim 1, wherein each of said first and second thin film transistors is an N-channel thin film transistor.

3. The electronic equipment according to claim 1, wherein each of said first, second and third gate electrodes comprises a metal selected from the group consisting of chromium, tantalum, titanium, tungsten, and molybdenum.

4. The electronic equipment according to claim 1, wherein said pixel electrode comprises zinc oxide.

5. The electronic equipment according to claim 1, wherein said taper angle is in a range of 5°

to 45°

.

6. The electronic equipment according to claim 1, wherein said taper angle is in a range of 7°

to 20°

.

7. The electronic equipment according to claim 1, wherein said electronic equipment includes one of a video camera, a digital camera, a projector, a head mount display, a navigation system for a vehicle, a personal computer, and a portable information terminal.

8. An electronic equipment having a display device comprising:

a substrate;

a first thin film transistor formed over the substrate, said first thin film transistor comprising;

a first semiconductor island including at least a first channel formation region, a second channel formation region, lightly doped regions and source and drain regions;

a first gate insulating film formed over the first semiconductor island;

a first gate electrode formed over the first channel formation region with the first gate insulating film interposed therebetween; and

a second gate electrode formed over the second channel formation region with the first gate insulating film interposed therebetween;

a driving circuit including at least one second thin film transistor formed over the substrate, said second thin film transistor comprising;

a second semiconductor island including at least a third channel formation region;

a second gate insulating film formed over the second semiconductor island;

a third gate electrode formed over the third channel formation region with the second gate insulating film interposed therebetween;

an interlayer insulating film covering the first, second and third gate electrodes and said first and second semiconductor islands; and

a pixel electrode formed over the interlayer insulating film and electrically connected to one of the source and drain regions of the first semiconductor island,

wherein each of the first, second and third gate electrodes has tapered edges with a taper angle in a range of 3°

to 60°

,

wherein each of said lightly doped regions is partly overlapped by tapered portions of the first or second gate electrode and extends beyond a side edge of the first or second gate electrode.

9. The electronic equipment according to claim 8, wherein each of said first and second thin film transistors is an N-channel thin film transistor.

10. The electronic equipment according to claim 8, wherein each of said first, second and third gate electrodes comprises a metal selected from the group consisting of chromium, tantalum, titanium, tungsten, and molybdenum.

11. The electronic equipment according to claim 8, wherein said pixel electrode comprises zinc oxide.

12. The electronic equipment according to claim 8, wherein said taper angle is in a range of 5′

to 45°

.

13. The electronic equipment according to claim 8, wherein said taper angle is in a range of 7°

to 20°

.

14. The electronic equipment according to claim 8, wherein said electronic equipment includes one of a video camera, a digital camera, a projector, a head mount display, a navigation system for a vehicle, a personal computer, and a portable information terminal.

15. An electronic equipment having a display device comprising:

a substrate;

a first thin film transistor formed over the substrate, said first thin film transistor comprising;

a first semiconductor island including at least a first channel formation region, a second channel formation region, lightly doped regions, and a capacitor forming region;

a first gate insulating film formed over the first semiconductor island;

a first gate electrode formed over the first channel formation region with the first gate insulating film interposed therebetween;

a second gate electrode formed over the second channel formation region with the first gate insulating film interposed therebetween;

a driving circuit including at least one second thin film transistor formed over the substrate, said second thin film transistor comprising;

a second semiconductor island including at least a third channel formation region; and

a third gate electrode formed over the third channel formation region with the second gate insulating film interposed therebetween;

a capacitor electrode formed over the capacitor forming region of the first semiconductor island with an insulator interposed therebetween;

an interlayer insulating film covering the first, second and third gate electrodes and said first and second semiconductor islands;

a pixel electrode formed over the interlayer insulating film and electrically connected to an impurity region of the first semiconductor island,

wherein each of the first, second and third gate electrodes and said capacitor electrode has tapered edges with a taper angle of in a range of 3°

to 60°

.

16. The electronic equipment according to claim 15, wherein each of said first and second thin film transistors is an N-channel thin film transistor.

17. The electronic equipment according to claim 15, wherein each of said first, second and third gate electrodes comprises a metal selected from the group consisting of chromium, tantalum, titanium, tungsten, and molybdenum.

18. The electronic equipment according to claim 15, wherein said pixel electrode comprises zinc oxide.

19. The electronic equipment according to claim 15, wherein said taper angle is in a range of 5°

to 45°

.

20. The electronic equipment according to claim 15, wherein said taper angle is in a range of 7°

to 20°

.

21. The electronic equipment according to claim 15, wherein said electronic equipment includes one of a video camera, a digital camera, a projector, a head mount display, a navigation system for a vehicle, a personal computer, and a portable information terminal.

22. An electronic equipment having a display device comprising:

a substrate;

a first thin film transistor formed over the substrate, said first thin film transistor comprising;

a first semiconductor island including at least a first channel formation region, a second channel formation region, lightly doped regions and source and drain regions;

a first gate insulating film formed over the first semiconductor island;

a first gate electrode formed over the first channel formation region with the first gate insulating film interposed therebetween; and

a second gate electrode formed over the second channel formation region with the first gate insulating film interposed therebetween;

a driving circuit including at least one second thin film transistor formed over the substrate, said second thin film transistor comprising;

a second semiconductor island including at least a third channel formation region;

a second gate insulating film formed over the second semiconductor island;

a third gate electrode formed over the third channel formation region with the second gate insulating film interposed therebetween;

an interlayer insulating film covering the first, second and third gate electrodes and said first and second semiconductor islands; and

a pixel electrode formed over the interlayer insulating film and electrically connected to one of the source and drain regions of the first semiconductor island,

wherein each of the first, second and third gate electrodes includes a lower conductive layer and an upper conductive layer formed on the lower conductive layer wherein said lower conductive layer extends beyond side edges of the upper conductive layer and extending portions of the lower conductive layer are tapered with a taper angle of 3°

to 60°

.

23. The electronic equipment according to claim 22, wherein each of said first and second thin film transistors is an N-channel thin film transistor.

24. The electronic equipment according to claim 22, wherein said lower conductive layer comprises a metal selected from the group consisting of chromium, tantalum, titanium, tungsten, and molybdenum.

25. The electronic equipment according to claim 22, wherein said upper conductive layer comprises a metal selected from the group consisting of aluminum, tantalum, titanium, tungsten and molybdenum.

26. The electronic equipment according to claim 22, wherein said pixel electrode comprises zinc oxide.

27. The electronic equipment according to claim 22, wherein said taper angle is in a range of 5°

to 45°

.

28. The electronic equipment according to claim 22, wherein said taper angle is in a range of 7°

to 20°

.

29. The electronic equipment according to claim 22, wherein said electronic equipment includes one of a video camera, a digital camera, a projector, a head mount display, a navigation system for a vehicle, a personal computer, and a portable information terminal.

30. An electronic equipment having a display device comprising:

a substrate;

a first thin film transistor formed over the substrate, said first thin film transistor comprising;

a first semiconductor island including at least a first channel formation region, a second channel formation region, lightly doped regions and source and drain regions;

a first gate insulating film formed over the first semiconductor island;

a first gate electrode formed over the first channel formation region with the first gate insulating film interposed therebetween; and

a second gate electrode formed over the second channel formation region with the first gate insulating film interposed therebetween;

a driving circuit including at least one second thin film transistor formed over the substrate, said second thin film transistor comprising;

a second semiconductor island including at least a third channel formation region;

a second gate insulating-film formed over the second semiconductor island;

a third gate electrode formed over the third channel formation region with the second gate insulating film interposed therebetween;

an interlayer insulating film covering the first, second and third gate electrodes and said first and second semiconductor islands; and

a pixel electrode formed over the interlayer insulating film and electrically connected to one of the source and drain regions of the first semiconductor island,

wherein each of the first, second and third gate electrodes includes a lower conductive layer and an upper conductive layer formed on the lower conductive layer wherein said lower conductive layer extends beyond side edges of the upper conductive layer and extending portions of the lower conductive layer are tapered with a taper angle of 3°

to 60°

,

wherein each of said lightly doped regions is partly overlapped by the extending portion of the first conductive layer of the first or second gate electrode and extends beyond a side edge of the first conductive layer of the first or second gate electrode.

31. The electronic equipment according to claim 30, wherein each of said first and second thin film transistors is an N-channel thin film transistor.

32. The electronic equipment according to claim 30, wherein said lower conductive layer comprises a metal selected from the group consisting of chromium, tantalum, titanium, tungsten, and molybdenum.

33. The electronic equipment according to claim 30, wherein said upper conductive layer comprises a metal selected from the group consisting of aluminum, tantalum, titanium, tungsten and molybdenum.

34. The electronic equipment according to claim 30, wherein said pixel electrode comprises zinc oxide.

35. The electronic equipment according to claim 30, wherein said taper angle is in a range of 5°

to 45°

.

36. The electronic equipment according to claim 30, wherein said taper angle is in a range of 7°

to 20°

.

37. The electronic equipment according to claim 30, wherein said electronic equipment includes one of a video camera, a digital camera, a projector, a head mount display, a navigation system for a vehicle, a personal computer, and a portable information terminal.

38. An electronic equipment having a display device comprising:

a substrate;

a first thin film transistor formed over the substrate, said first thin film transistor comprising;

a first semiconductor island including at least a first channel formation region, a second channel formation region, lightly doped regions, and a capacitor forming region;

a first gate insulating film formed over the first semiconductor island;

a first gate electrode formed over the first channel formation region with the first gate insulating film interposed therebetween;

a second gate electrode formed over the second channel formation region with the first gate insulating film interposed therebetween;

a driving circuit including at least one second thin film transistor formed over the substrate, said second thin film transistor comprising;

a second semiconductor island including at least a third channel formation region; and

a third gate electrode formed over the third channel formation region with the second gate insulating film interposed therebetween;

a capacitor electrode formed over the capacitor forming region of the first semiconductor island with an insulator interposed therebetween;

an interlayer insulating film covering the first, second and third gate electrodes and said first and second semiconductor islands;

a pixel electrode formed over the interlayer insulating film and electrically connected to an impurity region of the first semiconductor island,

wherein each of the first, second and third gate electrodes includes a lower conductive layer and an upper conductive layer formed on the lower conductive layer wherein said lower conductive layer extends beyond side edges of the upper conductive layer and extending portions of the lower conductive layer are tapered with a taper angle of 3°

to 60°

.

39. The electronic equipment according to claim 38, wherein said lower conductive layer comprises a metal selected from the group consisting of chromium, tantalum, titanium, tungsten, and molybdenum.

40. The electronic equipment according to claim 38, wherein said upper conductive layer comprises a metal selected from the group consisting of aluminum, tantalum, titanium, tungsten and molybdenum.

41. The electronic equipment according to claim 38 wherein said pixel electrode comprises zinc oxide.

42. The electronic equipment according to claim 38, wherein said taper angle is in a range of 5°

to 45°

.

43. The electronic equipment according to claim 38, wherein said taper angle is in a range of 7°

to 20°

.

44. The electronic equipment according to claim 38, wherein said electronic equipment includes one of a video camera, a digital camera, a projector, a head mount display, a navigation system for a vehicle, a personal computer, and a portable information terminal.

45. The electronic equipment according to claim 38, wherein each of said first and second thin film transistors is an N-channel thin film transistor.