AM data recovery circuit

• US 20050104573A1
• Filed: 12/02/2004
• Published: 05/19/2005
• Est. Priority Date: 04/09/2002
• Status: Active Grant

• Current Assignee: Xueshan Technologies Inc. (Wi-LAN Inc.)
• Original Assignee: MStar Semiconductor Incorporated (MediaTek, Inc.)
• Inventors: Tin-Hang Yung, Henry, Smith, Sterling
• Granted Patent: US 7,274,921 B2
• Time in Patent Office: Days
• US Class Current: 323/312
• CPC Class Codes: G06K 19/0713 the arrangement including a power charge pump
• CPC Class Codes: G06K 19/0723 the record carrier comprising an arrangement for non-contact communication, e.g. wireless communication circuits on transponder cards, non-contact smart cards or RFIDs
• CPC Class Codes: G11C 5/142 Contactless power supplies, e.g. RF, induction, or IR
• CPC Class Codes: H04B 5/0062 in RFID [Radio Frequency Identification] Systems
• CPC Class Codes: H04B 5/77 for interrogation
• CPC Class Codes: H04B 7/086 using weights depending on external parameters, e.g. direction of arrival [DOA], predetermined weights or beamforming
• CPC Class Codes: Y02D 30/70 in wireless communication networks

Abstract

The present invention provides a passive RFID chip with on-chip charge pumps for generating electrical power for the chip from radio frequencies. The passive RFID chip comprises an analog portion and a digital portion. The analog portion primarily comprises a voltage sensor and an AM data detector. The digital portion comprises a state machine digital logic controller. Incoming RF signals enter the chip via external antennas. The RF signals are converted into regulated DC signals by RF-DC converters with the voltage sensor. The RF-DC converters provide power for all the on-chip components and hence the chip does not require external power supply. The incoming RF signals are demodulated by demodulators and enter the AM data detector where the envelope transitions are detected. A voltage alarm is provided to ensure the voltage level does not drop below an operational level of the chip. The logic signals and programming data are controlled by the state machine digital logic controller and the timing signals are provided by an on-chip oscillator.

Claims

1-16. -16. (canceled)

17. An AM data recovery circuit, comprising:

a demodulator for converting an incoming RF signal at an input node to a voltage signal at an output node; and

a current-mode data detector for converting said voltage signal into a current source, said current-mode data detector having a current output proportional to the power at said output node of said demodulator such that a demodulated signal can be generated.

18. The AM data recovery circuit as claimed in claim 17, further comprising:

said current-mode data detector for generating a control signal;

a low pass filter for generating another signal in response to said control signal; and

a shunt element connected to said input node of said demodulator to attenuate said RF signal in response to said control signal.