Method of in-situ damage removal - post O2 dry process

• US 20050106888A1
• Filed: 11/14/2003
• Published: 05/19/2005
• Est. Priority Date: 11/14/2003
• Status: Abandoned Application

• Current Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Original Assignee: Taiwan Semiconductor Manufacturing Company Limited
• Inventors: Tao, Hun-Jan, Chiu, Yuan-Hung, Chang, Ming-Ching
• Application Number:
  US10/714,207
• Publication Number:
  US 20050106888A1
• Time in Patent Office: Days
• US Class Current: 438/710
• CPC Class Codes: G03F 7/427 using plasma means only
• CPC Class Codes: H01L 21/02046 Dry cleaning only H01L21/02085 takes precedence
• CPC Class Codes: H01L 21/02063 the processing being the formation of vias or contact holes
• CPC Class Codes: H01L 21/31116 by dry-etching
• CPC Class Codes: H01L 21/31138 by dry-etching
• CPC Class Codes: H01L 21/76802 by forming openings in dielectrics
• CPC Class Codes: H01L 21/76814 post-treatment or after-treatment, e.g. cleaning or removal of oxides on underlying conductors

Abstract

An integrated process flow including a plasma step for removing oxide residues following oxygen ashing of a photoresist layer is disclosed. The oxide removal step is effective in preventing micro mask defects and is preferably performed in the same process chamber used for the oxygen ashing step and for a subsequent plasma etch used for pattern transfer. The oxide removal step takes less than 60 seconds and involves a halogen containing plasma that is generated from one or more of NF₃, Cl₂, CF₄, CH₂F₂, and SF₆. Optionally, HBr or a fluorocarbon C_XF_YH_Z where x and y are integers and z is an integer or is equal to 0 may be used alone or with one of the aforementioned halogen containing gases. The oxide removal step may be incorporated in a variety of applications including a damascene scheme, shallow trench (STI) fabrication, or formation of a gate electrode in a transistor.

Claims

1. An integrated process flow involving a patterned photoresist layer on a substrate in an etching tool that has one or more process chambers, said patterned photoresist layer having an opening with a top and bottom that extends through at least one underlying layer in said substrate, comprising:

(a) performing an oxygen ashing step to remove said patterned photoresist layer;

(b) performing a halogen containing plasma step; and

(c) transferring said opening through an exposed layer at the bottom of said opening in said substrate.

2. The method of claim 1 wherein said etching tool is a split power etcher, a dual power etcher, a single power etch tool, a reactive ion etcher, or a conventional barrel, direct, or downstream type of ashing tool.

3. The method of claim 1 wherein steps (a) and (b) are performed in the same process chamber of said etching tool.

4. The method of claim 1 wherein steps (a), (b), and (c) are performed in the same process chamber of said etching tool.

5. The method of claim 1 wherein said halogen containing plasma step involves a plasma that is formed from one or more of CF₄, CH₂F₂, SF₆, NF₃, Cl₂ and C_XF_YH_Z where x and y are integers and z is an integer or is 0.

6. The method of claim 5 wherein the halogen containing plasma step includes HBr in combination with one or more of CF₄, CH₂F₂, SF₆, NF₃, Cl₂ and C_XF_YH_Z where x and y are integers and z is an integer or is 0.

7. The method of claim 1 wherein the halogen containing plasma step is comprised of a halogen containing gas flow rate of about 3 to 500 standard cubic centimeters per minute (sccm), a chamber pressure between about 1 mTorr and 3 Torr, a chamber temperature of about −

15°

C. to 150°

C., a HFRF power or top RF power from about 100 to 3000 Watts, and a LFRF power or bias power of about 10 to 1000 Watts for a period of less than about 60 seconds.

8. The method of claim 1 wherein the etching tool is a single power tool and the halogen containing plasma step is comprised of a halogen containing gas flow rate of about 3 to 500 sccm, a chamber pressure between about 1 mTorr and 3 Torr, a chamber temperature of about −

15°

C. to 150°

C., and a RF power from about 50 to 1000 Watts for a period of less than about 60 seconds.

9. The method of claim 1 wherein said opening exposes an underlying silicon layer and step (c) forms a shallow trench in said substrate.

10. The method of claim 1 wherein said opening exposes an underlying gate layer and step (c) forms a gate electrode.

11. An integrated process flow for removing oxide residues, comprising:

(a) providing a substrate upon which a stack comprised of an upper patterned photoresist layer, a middle masking layer, and a lower pad oxide layer is formed and positioning said substrate in a process chamber of an etching tool, said patterned photoresist layer having a trench opening that extends through the masking layer and pad oxide layer;

(b) performing an oxygen ashing step to remove the patterned photoresist layer, said oxygen ashing step generates oxide residues on said substrate; and

(c) performing a halogen containing plasma step to remove said oxide residues.

12. The method of claim 11 further comprised of a plasma etch after the halogen containing plasma step to transfer said trench opening into said substrate.

13. The method of claim 12 wherein said plasma etch step is performed in the same etch tool as the halogen containing plasma step.

14. The method of claim 11 wherein the masking layer is comprised of silicon nitride or polysilicon and the substrate is a silicon substrate.

15. The method of claim 11 wherein said halogen containing plasma step involves a plasma that is formed from one or more of CF₄, CH₂F₂, SF₆, NF₃, Cl₂ and C_XF_YH_Z where x and y are integers and z is an integer or is 0.

16. The method of claim 11 wherein the halogen containing plasma treatment is comprised of a halogen containing gas flow rate of about 3 to 500 sccm, a chamber pressure between about 1 mTorr and 3 Torr, a chamber temperature of about −

15°

C. to 150°

C., a HFRF power from about 100 to 3000 Watts, and a LFRF power of about 10 to 1000 Watts for a period of less than about 60 seconds.

17. The method of claim 11 wherein the etching tool is a single power tool and the halogen containing plasma step is comprised of a halogen containing gas flow rate of about 3 to 500 sccm, a chamber pressure between about 1 mTorr and 3 Torr, a chamber temperature of about −

15°

C. to 150°

C., and a RF power from about 50 to 1000 Watts for a period of less than about 60 seconds.

18. The method of claim 11 wherein the stack further includes an organic ARC layer between the masking layer and the patterned photoresist layer and wherein the ARC layer is removed during the oxygen ashing step.

19. An integrated process flow for removing oxide residues, comprising:

(a) providing a substrate upon which a stack including a gate dielectric layer, a gate layer, a hard mask layer, and a photoresist layer are sequentially formed and positioning said substrate in a process chamber of an etching tool, said photoresist layer has a pattern comprised of openings that extend through the hard mask layer;

(b) performing an oxygen ashing step to remove the patterned photoresist layer, said oxygen ashing step generates oxide residues on said substrate; and

(c) performing a halogen containing plasma step to remove said oxide residues.

20. The method of claim 19 further comprised of a plasma etch after the halogen containing plasma step to transfer said pattern through the gate layer to form a gate electrode.

21. The method of claim 20 wherein said plasma etch step is performed in the same etch tool as the halogen containing plasma step.

22. The method of claim 19 wherein the gate dielectric layer is comprised of SiO₂ or a high k dielectric material.

23. The method of claim 19 wherein the gate layer is comprised of polysilicon or amorphous silicon.

24. The method of claim 19 wherein the hard mask is silicon nitride, silicon oxynitride, or silicon oxide.

25. The method of claim 19 wherein said halogen containing plasma step involves a plasma that is formed from one or more of CF₄, CH₂F₂, SF₆, NF₃, Cl₂ and C_XF_YH_Z where x and y are integers and z is an integer or is 0.

26. The method of claim 19 wherein the halogen containing plasma step is comprised of a halogen containing gas flow rate of about 3 to 500 sccm, a chamber pressure between about 1 mTorr and 3 Torr, a chamber temperature of about −

15°

C. to 150°

C., a HFRF power from about 100 to 3000 Watts, and a LFRF power of about 10 to 1000 Watts for a period of less than about 60 seconds.

27. The method of claim 19 wherein the etching tool is a single power tool and the halogen containing plasma step is comprised of a halogen containing gas flow rate of about 3 to 500 sccm, a chamber pressure between about 1 mTorr and 3 Torr, a chamber temperature of about −

15°

C. to 150°

C., and a RF power from about 50 to 1000 Watts for a period of less than about 60 seconds.

28. The method of claim 19 wherein the stack further includes an organic ARC layer between the hard mask and the patterned photoresist layer and wherein the ARC layer is removed during the oxygen ashing step.

29. An integrated process flow for removing oxide residues, comprising:

(a) providing a substrate having a stack comprised of an upper patterned photoresist layer, a middle dielectric layer, and a lower etch stop layer formed thereon and positioning said substrate in a process chamber of an etching tool, said patterned photoresist layer having an opening formed therein which extends through said dielectric layer and exposes a portion of said etch stop layer;

(b) performing an oxygen ashing step to remove the patterned photoresist layer, said oxygen ashing step generates oxide residues on said substrate; and

(c) performing a halogen containing plasma step to remove said oxide residues and the exposed portion of said etch stop layer.

30. The method of claim 29 further comprised of a plasma process after the halogen containing plasma step to remove polymer residues formed during removal of the exposed etch stop layer.

31. The method of claim 30 wherein said plasma process is performed in the same etch tool as the halogen containing plasma step.

32. The method of claim 29 wherein the opening in the dielectric layer is a via, a contact hole, a trench, or a trench formed above a via.

33. The method of claim 29 wherein the stack is further comprised of a cap layer between the dielectric layer and the patterned photoresist layer.

34. The method of claim 29 wherein the stack is further comprised of an organic ARC layer between the dielectric layer and the patterned photoresist layer, said organic ARC is removed with the patterned photoresist during the oxygen ashing step.

35. The method of claim 29 wherein the etch stop layer is silicon nitride, silicon carbide, or silicon oxynitride.

36. The method of claim 29 wherein the dielectric layer is comprised of SiO₂, PSG, BPSG, or a low k dielectric material which is fluorine doped SiO₂, carbon doped SiO₂, a silsesquioxane polymer, a poly(arylether), or benzocyclobutene.

37. The method of claim 29 wherein said halogen containing plasma step involves a plasma that is formed from one or more of CF₄, CH₂F₂, SF₆, NF₃, Cl₂ and C_XF_YH_Z where x and y are integers and z is an integer or is 0.

38. The method of claim 29 wherein the halogen containing plasma step is comprised of a halogen containing gas flow rate of about 3 to 500 sccm, a chamber pressure between about 1 mTorr and 3 Torr, a chamber temperature of about −

15°

C. to −

150°

C., a HFRF power from about 100 to 3000 Watts, and a LFRF power of about 10 to 1000 Watts for a period of less than about 60 seconds.

39. The method of claim 29 wherein the etching tool is a single power tool and the halogen containing plasma step is comprised of a halogen containing gas flow rate of about 3 to 500 sccm, a chamber pressure between about 1 mTorr and 3 Torr, a chamber temperature of about −

15°

C. to 150°

C., and a RF power from about 50 to 1000 Watts for a period of less than about 60 seconds.